W pracy przedstawiono analizę zmian parametrów elektrycznych i niezawodnościowych, jakie wprowadza obecność bogatej we fluor warstwy w strukturze bramkowej układu MOS (MIS] z dielektrykami bramkowymi wytwarzanymi metodą PECVD. Powierzchnia podłoży krzemowych przed wykonaniem struktur testowych poddana została odmiennie, niż spotyka się to najczęściej w literaturze, procesom ultra-płytkiej implantacji jonów z plazmy CF₄. Uzyskane wyniki wskazują, że badane układy MOS (MIS), wykonane na zmodyfikowanych podłożach krzemowych, charakteryzują się mniejszymi (co do wartości bezwzględnej) wartościami napięcia płaskich pasm (UFB) oraz ładunku efektywnego (Qeff) w porównaniu do struktur referencyjnych. Nie zmienia się natomiast znacząco gęstość stanów powierzchniowych w środku pasma energii zabronionej krzemu (Ditmb). Wprowadzenie fluoru w obszar graniczny półprzewodnik/dielektryk struktur MOS (MIS) powoduje w konsekwencji także nieznacznie zmniejszenie wartości przenikalności elektrycznej warstw dielektrycznych.
EN
In this work, the analysis of changes in electro-physical and reliability properties, which introduce fluorine-rich dielectric layer formed in the gate of MOS (MIS] structures with PECVD dielectric layers, has been reported. In contrary to commonly found in literature ways, ultra-shallow fluorine implantation from CF₄ plasma of silicon substrates, before the fabrication of test structures, was performed. Presented results have shown, that investigated MOS (MIS) structures, fabricated on modified silicon substrates, are characterized by lower (in absolute values) flat-band voltage (UFB) and effective charge (Qeff) values in comparison to reference structures. Moreover, interface states density in the middle of silicon forbidden band values (Ditmb do not seem to differ significantly In consequence, introduction of fluorine into the semiconductor/dielectric interface of MOS (MIS] structure results in a small decrease of permittivity constant of PECVD dielectric layers.
This study describes the effects of high temperature annealing performed on structures fluorinated during initial silicon dioxide reactive ion etching (RIE) process in CF4 plasma prior to the plasma enhanced chemical vapour deposition (PECVD) of the final oxide. The obtained results show that fluorine incorporated at the PECVD oxide/Si interface during RIE is very stable even at high temperatures. Application of fluorination and high temperature annealing during oxide layer fabrication significantly improved the properties of the interface (Ditmb decreased), as well as those of the bulk of the oxide layer (Qeff decreased). The integrity of the oxide (higher Vbd ) and its uniformity (Vbd distribution) are also improved.
This study describes a novel technique to form good quality low temperature oxide (< 350 C degree). Low temperature oxide was formed by N2O + SiH4:N2 plasma in a plasma enhanced chemical vapour deposition (PECVD) system on the silicon surface reactively etched in CF4 plasma (RIE - reactive ion etching). The fabricated oxide demonstrated excellent (for low temperature dielectric formation process) currentvoltage (I-V) characteristics, such as: low leakage current, high breakdown voltage and good reliability. Experimental results indicate that the proposed method of fluorine incorporation into the SiO2/Si inteface improves electrical parameters of MOS structures.
W pracy przedstawiono nową strukturę bramkową, złożoną z dwóch warstw dielektryka bramkowego - tlenko-azotku krzemu (SiOxNy) oraz dwutlenku hafnu (HfO2), która mogłaby być wykorzystana w strukturach nieulotnych pamięci półprzewodnikowych (NVSM). Struktury MIS z SiOxNy wykazują duże zmiany napięcia płaskich pasm (ok. 1,68 V), natomiast maksymalny ładunek możliwy do zmagazynowania wynosi ok. 6⋅1012 [cm-2]. Dla porównania, struktura MIS z warstwą referencyjną dwutlenku krzemu (SiO2) oraz dwutlenku hafnu charakteryzuje się niestabilnym przebiegiem zmian napięcia płaskich pasm pod wpływem napięcia stresującego, a wielkość zmian UFB wynosi tylko ok. 0,27 V. Zaprezentowane w niniejszej pracy wyniki, jako pierwsze w literaturze, pokazują potencjalne możliwości wykorzystania ultracienkich warstw tlenko-azotków wytwarzanych metodą PECVD w strukturach nieulotnych pamięci półprzewodnikowych (NVSM)
EN
In this paper, we present the new double gate dielectric structure for the non-volatile semiconductor memory (NVSM) devices which applies gate stack consisting of ultrathin silicon oxynitride (SiOxNy) and hafnium dioxide (HfO2) layers. The MIS structure with PECVD SiOxNy shows a big change of flat-band voltage (1,68 V) and the maximum charge density stored by the double gate dielectric stack is of the order of 6⋅1012 [cm-2]. This is much more than for the reference structures built on thermal silicon oxide layers (U FB change of the order of 0.27 V). The results presented in this paper prove, for the first time, potential to apply PECVD silicon oxynitride layers in non-volatile semiconductor memory (NVSM) devices.
W artykule przedstawiona zostanie nowa metoda szacowania energii jonów i rozkładu ich gęstości w plazmie, podczas procesu trawienia plazmowego RIE w plazmie CF4. Metoda ta łączy w sobie eksperyment technologiczny z komputerowo przeprowadzoną symulacją procesu implantacji. W celu oszacowania energii jonów fluoru i rozkładu ich gęstości w plazmie, kształt profilu rozkładu jonów fluoru otrzymany z pomiaru SIMS porównany został z profilami rozkładu jonów fluoru otrzymanymi z procesu symulacji jego implantacji. Symulacja ta przeprowadzona została w programie SRIM. W wyniku przeprowadzonego procesu odwzorowywania, z dużej grupy energii implantacji otrzymanych z procesu symulacji, wybrane zostało pięć, które poprawnie odwzorowywują kształt profilu zmierzonego za pomocą SIMS. Na ich podstawie wyliczony został strumień jonów fluoru, biorących udział w procesie trawienia plazmowego RIE, przy zadanych jego parametrach.
EN
In this paper we present a novel method, which allows evaluation of these parameters basing on performed experiments, the results of their characterization and computer simulation. The method is shown on the example of RIE in CF4, during which fluorine ions are implanted into the substrate. In order to evaluate the ions parameters (concentration and energy distribution) the profiles determined by ULE-SIMS were then compared with fluorine profiles simulated by SRIM. In order to obtain good fitting to the experimental profile, several SRIM profiles for different ions energies had to be taken into account. This allowed for determination of fluxes of fluorine ions impinging the substrate surface and their energy distribution for the experimental conditions used in this study.
We have investigated the influence of silicon dioxide reactive ion etching (RIE) parameters on the composition of the polymer layer that is formed during this process on top of the etched layer, and finally, the role of this layer in high-temperature thermal diffusion of boron into silicon. The polymeric layer formed on the etched surface appeared to consist of fluorine and silicon fluoride (SiOF and SiF). Concentration of these components changes depending on the parameters of RIE process, i.e., rf power, gas pressure and etching time. The composition of this polymeric layer affects, in turn, boron thermal diffusion into silicon. With increasing rf power, the depth of boron junction is increased, while increasing time of etching process reduces boron diffusion into silicon.
This work reports on changes in the properties of ultra-thin PECVD silicon oxynitride layers after high- temperature treatment. Possible changes in the structure, composition and electrophysical properties were investigated by means of spectroscopic ellipsometry, XPS, SIMS and electrical characterization methods (C-V, I-V and charge- pumping). The XPS measurements show that SiOxNy is the dominant phase in the ultra-thin layer and high-temperature annealing results in further increase of the oxynitride phase up to 70% of the whole layer. Despite comparable thickness, SIMS measurement indicates a densification of the annealed layer, because sputtering time is increased. It suggests complex changes of physical and chemical properties of the investigated layers taking place during high-temperature annealing. The C-V curves of annealed layers exhibit less frequency dispersion, their leakage and charge-pumping currents are lower when compared to those of as-deposited layers, proving improvement in the gate structure trapping properties due to the annealing process.
This paper reports on the studies of oxidation kinetics of silicon strained by silicon germanium layers. Experimental results of natural, chemical and thermal oxide formation are presented. The oxidation rates of silicon strained by SiGe layers have been compared with the rates of pure Si oxidation. The oxidation kinetics was studied using the parallel model proposed by Beck and Majkusiak. This model was fitted with good result to the obtained experimental data and the parameter that is most probably responsible for the strain effect was identified, as well as its dependence on Ge content in the SiGe layer.
Experiments presented in this work are a summary of the study that examines the possibility of fabrication of oxynitride layers for Si structures by nitrogen implantation from rf plasma only or nitrogen implantation from rf plasma followed immediately by plasma oxidation process. The obtained layers were characterized by means of: ellipsometry, XPS and ULE-SIMS. The results of electrical characterization of NMOS Al-gate test structures fabricated with the investigated layers used as gate dielectric, are also discussed.
In this paper differences in chemical composition of ultra-thin silicon oxynitride layers fabricated in planar rf plasma reactor are studied. The ultra-thin dielectric layers were obtained in the same reactor by two different methods: ultrashallow nitrogen implantation followed by plasma oxidation and plasma enhanced chemical vapour deposition (PECVD). Chemical composition of silicon oxynitride layers was investigated by means of X-ray photoelectron spectroscopy (XPS) and secondary ion mass spectrometry (SIMS). The spectroscopic ellipsometry was used to determine both the thickness and refractive index of the obtained layers. The XPS measurements show considerable differences between the composition of the fabricated layers using each of the above mentioned methods. The SIMS analysis confirms XPS results and indicates differences in nitrogen distribution.
The goal of this work was to study nitrogen implantation from plasma with the aim of applying it in dual gate oxide technology and to examine the influence of the rf power of plasma and that of oxidation type. The obtained structures were examined by means of ellipsometry, SIMS and electrical characterization methods.
This study concerns modifications of Si-cBN interface (with and without dielectric underlayer), c-BN films produced on p-type <100> Si substrates by means of Radio Frequency (RF) CVD process. Silicon nitride and oxynitride were deposited by Plasma Enhanced Chemical Vapour Deposition technique and used as a dielectric underlayer. MIS devices were fabricated to allow electrical characterization. Moreover, the influence of underlayers on adhesion of c-BN to silicon substrate was examined.
Przedstawiono korzystne właściwości materiałowe krzemogermanu oraz jego zastosowanie w przyrządach półprzewodnikowych, takich jak tranzystor bipolarny (baza) oraz tranzystor MOS.
EN
In this paper advantageous material properties of silicon-germanium are presented as well as the application of SiGe in semiconductor devices, such as: bipolar transistor (base) and MOSFET (channel, gate, source and drain contacts).
The radiation damage caused by low energy r.f. plasmas has not been, to our knowledge, studied so far in the case of symmetric planar plasma reactors that are usually used for PECVD processes. The reason is that, unlike nonsymmetrical RIE reactors, such geometry prevents, basically, high-energy ion bombardment of the substrate. In this work, we present the results of experiments in which we have studied the influence of plasma processing on the state of silicon surface. Very low temperature plasma oxidation has been used as a test of silicon surface condition. The obtained layers were then carefully measured by spectroscopic ellipsometry, allowing not only the thickness to be determined accurately, but also the layer composition to be evaluated. Different plasma types, namely N2, NH3 and Ar, were used in the first stage of the experiment, allowing oxidation behaviour caused by the exposure to those plasma types to be compared in terms of relative differences. It has been clearly proved that even though the PECVD system is believed to be relatively safe in terms of radiation damage, in the case of very thin layer processing (e.g., ultra-thin oxynitride layers) the effects of radiation damage may considerably affect the kinetics of the process and the properties of the formed layers.
Opracowanie poświęcone jest zbadaniu wpływu wygrzewania wysokotemperaturowego na właściwości elektrofizyczne ultracienkich warstw SiOxNy.
EN
The aim of this work is the experimental study of the influence of high-temperature annealing on electro-physical properties of the ultrathin oxynitride layers.
Przedstawione w pracy eksperymenty są częścią szerszych studiów mających na celu zbadanie możliwości zastosowania jednocześnie obu etapów wytwarzania warstwy dielektrycznej, np. ultrapłytkiej implantacji jonów azotu i utleniania w jednym stanowisku technologicznym.
EN
Presented in this work experiments are a part of a broader study that examines the possibility of conducting both stages of creation of the dielectric (e.g. ultra-shallow nitrogen implantation and silicon oxidation) in one technological reactor.
In this work, a review of possible methods of oxynitride film formation will be given. These are different combinations of methods applying high-temperature oxidation and nitridation, as well as ion implantation and deposition techniques. The layers obtained using these methods differ, among other aspects in: nitrogen content, its profile across the ultrathin layer,... etc., which have considerable impact on device properties, such as leakage current, channel mobility, device stability and its reliability. Unlike high-temperature processes, which (understood as a single process step) usually do not allow the control of the nitrogen content at the silicon-oxynitride layer interface, different types of deposition techniques allow certain freedom in this respect. However, deposition techniques have been believed for many years not to be suitable for such a responsible task as the formation of gate dielectrics in MOS devices. Nowadays, this belief seems unjustified. On the contrary, these methods often allow the formation of the layers not only with a uniquely high content of nitrogen but also a very unusual nitrogen profile, both at exceptionally low temperatures. This advantage is invaluable in the times of tight restrictions imposed on the thermal budget (especially for high performance devices). Certain specific features of these methods also allow unique solutions in certain technologies (leading to simplifications of the manufacturing process and/or higher performance and reliability), such as dual gate technology for system-on-chip (SOC) manufacturing.
Praca poświęcona jest badaniu potencjalnych możliwości zastosowania plazmy w cz. (13,56 MHz) do wytwarzania ultracienkich (<10nm) warstw SiO2.
EN
The aim of this work is the experimental study of potential possibilities of oxidation in r.f. (13.56 MHz) plasma application for the formation of ultrathin (<10 nm) oxide layers.
Przedstawiono sprzęt i oprogramowanie sterownika pieca do wieloetapowych procesów technologicznych stosowanych przy wytwarzaniu struktur półprzewodnikowych. Sterownik zaprojektowano w Instytucie Mikroelektroniki i Optoelektroniki Politechniki Warszawskiej.
EN
Equipment for automated operation of a furnace for fabrication of semiconductor structures is presented together with the controlling software. The system was designed in the Institute of Microelectronics & Optoelectronics, WUT.
In near future silicon technology cannot do without ultrathin oxides, as it becomes clear from the "Roadmap'2000". Formation, however, of such layers, creates a lot of technical and technological problems. The aim of this paper is to present the technological methods, that potentially can be used for formation of ultrathin oxide layers for next generations ICs. The methods are briefly described and their pros and cons are discussed.
JavaScript jest wyłączony w Twojej przeglądarce internetowej. Włącz go, a następnie odśwież stronę, aby móc w pełni z niej korzystać.