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1

Piezoresistive sensors for atomic force microscopy - numerical simulations by means of virtual wafer fab

Dębski T., Barth W., Rangelow I.W., Domański K., Tomaszewski D., Grabiec P., Jakubowski A.

Journal of Telecommunications and Information Technology

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2001

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nr 1

35-39

EN

An important element in microelectronics is the comparison of the modelling and measurements results of the real semiconductor devices. Our paper describes the final results of numerical simulation of a micromechanical process sequence of the atomic force microscopy (AFM) sensors. They were obtained using the virtual wafer fab (VWF) software, which is used in the Institute of Electron Technology (IET). The technology mentioned above is used for fabrication of the AFM cantilevers, which has been designed for measurement and characterization of the surface roughness, the texturing, the grain size and the hardness. The simulation are very useful in manufacturing other microcantilever sensors.

2

Fabrication and properties of the field emission array with self-alignment gate electrode

Barth W., Dębski T., Rangelow I.W., Grabiec P., Studzińska K., Zaborowski M., Mitura S., Biehl S., Hudek P., Kostic I.

Journal of Telecommunications and Information Technology

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2001

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nr 1

49-52

EN

A new method for the fabrication of field emission arrays (FEA) based on bulk/surface silicon micromachining and diamond-like-carbon (DLC) coating was developed. A matrix of self-aligned electron field emitters is formed in silicon by mean anisotropic etching in alkali solution of the front silicon film through micro holes opened in silicon oxide layer. The field emission of the fabricated emitter tips is enhanced by a diamond-like-carbon film formed by chemical vapor deposition on the microtips. Back side contacts are formed by metal patterning. Detailed Raman, Auger and TEM investigations of the deposited DLC films (nanocrystalline diamond smaller than 10 nm) will be presented. In this paper we discuss the problems related to the development of field emission arrays technology. We also demonstrate examples of devices fabricated according to those technologies.

3

Adsorption properties of porous silicon

Domański K., Grabiec P., Gotszalk T., Beck R.B., Dębski T., Rangelow I.W.

Journal of Telecommunications and Information Technology

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2001

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nr 1

53-56

EN

Porous silicon shows some interesting features for micromechanical applications. Some applications make use of its high surface-to-volume ratio. A capacitive gas or humidity sensor using the adsorption of gases on the porous surface can be easily fabricated. However an opportunity for more sensitive device is given by micromechanical structure. In this paper we report on the piezoresistive cantilever beam structure with porous silicon adsorbing spot as a gas sensor.

4

Bonding and etch-back techniques for SOI technology

Łozinko J., Panas A., Budzyński T., Grabiec P., Dębski T.

Electron Technology

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1999

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Vol. 32, No. 1/2

162-165

EN

The purpose of this paper is to show results of investigations on bonding and etch-back technoques (BESOI) for applicatios in the fabrication of Silicon-On-Insulator (SOI). Results obtained for high (≥ 1000°C) temperature silicon wafer-to-wafer bond process, where silicon dioxide is used as an intermediate layer, will be presented. Method for thinning of the bonded wafer was performed by preferential etch technoque using p⁺ etch-stop layer.

5

An effect of PD SOI MOSFET parameters variations on its electrical characteristics

Tomaszewski D., Jakubowski A., Dębski T.

Electron Technology

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1999

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Vol. 32, No. 1/2

91-95

EN

This work pesents an effect of variations of several and electrical parameters for the DC I-V characteristics of the partially-depleted SOI MOSFETs. The calculations have been done using the physical model of the PD SOI MOSFETs. The calculations show that model characteristics are sensitive to variations of the minority carriers recombination lifetime in the Si film, generation lifetime in the junctions space-charge areas and the film thickness.