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Physically based modelling of the double-gate SOI transistor with thin semiconductor film

100%

Majkusiak B. , Janik T.

tom Vol. 32, No. 1/2

29-38

The physically based modelling of the double-gate SOI transistor is addressed in reference to the electron concentration distribution, electron charge density, threshold voltage, electron effective mobility and drain current. Two approaches to the description of the semiconductor region are used - the "classical" model based on solution to the Poisson equation and the "quantum" model based on the self-consistent solution to the Schrodinger and Poisson equation system. A special attention is paid to the influence of the semiconductor film thickness on the D-G SOI MOSFET modelling. Comparison of results obtained from different models for various semiconductor film thicknesses is presented.

Modelling of the effective mobility versus effective electric field in the GAA SOI transistor

80%

Walczak J. , Majkusiak B. , Janik T.

tom Vol. 32, No. 1/2

119-122

Analytical expressions describing effective electron mobility and effective transverse electric field in the Gate-All Around (GAA) SOI transistor are proposed as functions of silicon substrate thickness, inversion layer charge and averge distance of electrons from the surface.

A quantum factor correction for modelling the C-V characteristics if the MOS-SOI structure

80%

Badri M. , Ikraiam F. A. , Majkusiak B. , Beck R. B.

tom Vol. 32, No. 1/2

130-132

A quantum correction factor applying to the MOS-SOI system has been adapted from previous works and modified for the MOS-SOI systems to take into account the quantum mechanical correction for the energy quantization of carriers in modelling the C-V characteristics of these structures.

Materiały o dużej stałej dielektrycznej w tranzystorach MOS

80%

Mazurak A. , Walczak J. , Majkusiak B.

tom Vol. 49, nr 9

96-102

W artykule przedstawiono alternatywne dla SiO2 materiały dielektryka bramkowego tranzystora MOS. Omówiono kryteria selekcji materiałów o dużej stałej dielektrycznej (high-K). Zaproponowano tunelową grubość tlenku TOT materiału o dużej stałej dielektrycznej jako miarę redukcji prądu tunelowego dla określonej równoważnej grubości tlenku EOT. Zaprezentowano wyniki symulacji tunelowego prądu elektronów w strukturach zawierających różne warstwy dielektryczne high-K i ultracienką przypowierzchniową warstwę SiO2.

Insulator materials, which are alternative for silicon dioxide as a gate insulator in a MOS transistor, are presented. Selection criteria for high-K dielectrics are discussed. Results of simulation of the electron tunnel current for gate stacks of different high-K dielectric constants and with a SiO2 interfacial layer are presented. The tunnel oxide thickness TOT of a high-K layer can be a measure of the possibility of reduction of the tunnel current for an assumed equivalent oxide thickness EOT.

Prediction of I-V characteristics of double-gates SOI MOSFETs with ultrathin semiconductor layer

80%

Janik T. , Majkusiak B. , Jakubowski A.

2000

tom Vol. 33, No. 4

567-570

Current-voltage characteristics of the double-gate SOI transistor with ultrathin and undoped semiconductor film are investigated. The charge of channel carriers is calculated with a self-considerent solution of the Schrodinger and Poisson equation system. The obtained charge is introduced into a Pao-Sah-like model of the double-gate SOI transisor to calculate the drain curent. Simulation results show influence of carrier energy quantization and channel overlapping effect on transistor performace.