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1 Electron Technology

1 1999

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High frequency four noise parameters of silicon-on-insulator-based technology MOSFET : prospects for application to low noise RF intergrated circuits

Dambrine G., Raskin J. P., Picheta L., Vanhoenacker D., Colinge J. P., Cappy A.

Electron Technology

1999

Vol. 32, No. 1/2

81-87

An exhaustive experimental study of the high frequency noise properties of MOSFET in Silicon-on-Insulator (SOI) technology is presented. Various gate geometries are fabricated to study the influence of effective channel length and gate finger width on the four noise parameters. The high level of MOSFET sensitivity to the minimum noise matching conditions is demonstrated. From experimental results, optimization ways to realize ultra low noise amplifiers are discussed. The capability of the fully depleted standard SOI CMOS process for realizing low noise amplifiers for multigigahertz portable communication systems is shown. A minimum noise figure of about 0.7 dB and an available gain of 15 dB at 2 GHz have been obtained in the case of 0.6 µm effective gate length processes for applications in upper frequency range.