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Design, functionality and tests of multichannel IC for digital imaging

100%

Gryboś P. , Idzik M. , Maj P. , Świentek K.

tom Vol. 47, nr 10

8-10

This paper presents the design and results of first measurements of a fast binary readout architecture ASIC aimed for digital X-ray imaging. The ASIC called DEDIX includes 64 readout channels, a number of DACs for different blas and threshold settings, voltage reference, calibration circuit, I/O circuit and a control logic circuit. Each readout channel consists of charge amplifier, PZC circuit, shaper, two discriminators and two 20-bit counters.The DEDIX is supposed to work in a relatively complex systems featuring several hundred readout channels. For this reason particular attention was paid to general system solutions and the IC testability. The DEDIX IC was implemented in a 0,35 µm CMOS technology and first tests confirm full its functionality.

Zaprezentowano projekt i wyniki pomiarów wielokanałowego szybkiego układu ASIC o architekturze binarnej przeznaczonego do obrazowania cyfrowego z wykorzystaniem promieniowania X. Układ ASIC o nazwie DEDIX zawiera 64 kanały elektroniki odczytu, przetworniki C/A do polaryzacji układu i ustawiania progów dyskryminacji, źródło referencyjne, układ wewnętrznej kalibracji, układ WE/WY i blok kontroli. Każdy z kanałów elektroniki odczytu zawiera wzmacniacz ładunkowy, układ PZC, układ kształtujący dwa dyskryminatory i dwa 20-bitowe liczniki. Układ DEDIX przeznaczony jest do pracy w złożonych systemach obejmujących kilkaset kanałów odczytowych. Z tego powodu należy zwrócić szczególną uwagę na rozwiązania systemowe i możliwości testowania układu scalonego. Układ scalony DEDIX został wykonany w technologii 0,35 µm CMOS, a pierwsze testy potwierdzają jego pełną funkcjonalność.

64 channel neural recording amplifier with tunable bandwidth in 180 nm CMOS technology

88%

Gryboś P. , Kmon P. , Żołądź M. , Szczygieł R. , Kachel M. , Lewandowski M. , Błasiak T.

tom Vol. 18, nr 4

631-643

This paper presents the design and measurements of low-noise multichannel front-end electronics for recording extra-cellular neuronal signals using microelectrode arrays. The integrated circuit contains 64 readout channels and is fabricated in CMOS 180 nm technology. A single readout channel is built of an AC coupling circuit at the input, a low-noise preamplifier, a band-pass filter and a second amplifier. In order to reduce the number of output lines, the 64 analog signals from readout channels are multiplexed to a single output by an analog multiplexer. The chip is optimized for low noise and good matching performance and has the possibility of passband tuning. The low cut-off frequency can be tuned in the 1 Hz - 60 Hz range while the high cut-off frequency can be tuned in the 3.5 kHz - 15 kHz range. For the nominal gain setting at 44 dB and power dissipation per single channel of 220 žW, the equivalent input noise is in the range from 6 žV - 11 žV rms depending on the band-pass filter settings. The chip has good uniformity concerning the spread of its electrical parameters from channel to channel. The spread of the gain calculated as standard deviation to mean value is about 4.4% and the spread of the low cut-off frequency set at 1.6 Hz is only 0.07 Hz. The chip occupies 5×2.3 mm⊃2 of silicon area. To our knowledge, our solution is the first reported multichannel recording system which allows to set in each recording channel the low cut-off frequency within a single Hz with a small spread of this parameter from channel to channel. The first recordings of action potentials from the thalamus of the rat under urethane anesthesia are presented.

Performence of multichannel FX chip with DC Coupled Schottky CdTe detector

51%

Kachel M.

Electronics and Telecommunications Quarterly

2008

tom Vol. 54, No 4

483-492

This paper describes the performance of multichannel ASIC (called FX) which has been connected to Schottky CdTe detector by DC coupling. Because of DC coupling, leakage current of the detector flows into readout electronics and changes its performance. The I-V characteristic of CdTe Schottky detector with guard ring have been measured and we have performed both simulation and experimental verification of FX IC behavior vs. detector leakage current. Due to the low values of this detector leakage current (140 pA for bias voltage of 700 V) performance of FX IC is slightly influenced. Measurements performed with low values of detector's leakage current (below 1 nA), show that the gain of readout channel stays constant with changes of leakage current, while the offset voltage at the discrimonator input changes linearly of about 4.5 mV per 100 pA of the detector leakage current. Limitations of DC coupling method are shown based on measurements with Schottky CdTe detector without guard ring, which produces higer leakage current.