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EN
The local binary pattern (LBP) is a gray-scale and rotation invariant operator, and has been proved to be theoretically very simple, yet computational efficient approach for texture classification. As for the irregular texture surface image, like pavement surface image, the original LBP performs not good enough for practical purposes. First, threshold in plain area often cause mismatch in local structure. Second, nonuniform patterns were directly merged into one pattern will discards large amount of texture information represented by these patterns. In this paper, a novel LBP based operator for pavement crack detection is proposed. In our approach, local neighbors are classified into smooth area and rough area, segmentation only performed in rough area to catch local structure information. And then, local patterns are regrouped and a lookup table is created for fast implement. With these methods, the proposed approach detects cracks well and becomes more robust against noise. Experiments on the pavement surface image show the good performance of this new LBP based operator. More importantly, because of its simplicity, online implementation is possible as well.
2
Content available remote An Inverse Halftoning Technique Using Modified Look-Up Tables
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EN
In this paper, we shall propose a method to invert halftone images. We shall use a modified look-up table to reconstruct gray level images from halftone images. In the modified look-up table training phase, we shall use a sliding window to get halftone patterns and their corresponding gray-level lists. The modified look-up table can be obtained by calculating the centroid of the gray-level lists. In the image reconstruction phase, we shall use the sliding window to slide around the pixel to reconstruct so that we can get candidate gray values. The reconstructed gray value can be obtained by calculating the centroid of the candidate gray values. Experimental results have shown that our method indeed can get satisfied results.
3
Content available remote Pixel-based skin color detection technique
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EN
One of the simplest features used for the human face detection problem is the skin color information. A simple and relatively efficient histogram-based algorithm to segment skin pixels from a complex background is presented. The histogram-based algorithm used here is referred to as the lookup table (LUT) and is adopted to identify those intervals which may fall in the skin locus plane. For that purpose, a total of 306,401 skin samples are manually collected from RGB color images to calculate three lookup tables based on the relationship between each single pair of the three components (R, G, B). To estimate the skin locus boundary, a skin classifier box is created by integration of the proposed three heuristic rules based on how often each RGB pixel-relationship falls into its interval.
PL
W pracy przedstawiono analizę znanych podejść do poprawy jakości obrazów przez wzmacnianie ich kontrastu z wykorzystaniem przekształceń globalnych poziomów jakości. Autorzy zaproponowali oryginalną metodę dwuparametrycznego przetwarzania poziomów jasności obrazu, która wykorzystuje do obliczeń kontrastu elementu obrazu poziom subiektywnej adaptacji obserwatora do jasności. W połączeniu z metodami wzmacniania kontrastu lokalnego zapewnia ona poprawę jakości obrazu. Efektywność metod została zilustrowana przykładami.
EN
The analysis of known approaches to image quality enhancement with contrast amplification by global transformation is carried out. The original biparametric method for image gray level transformation, which uses pixel contrast evaluation with respect to fixed adaptation gray level, has been proposed. In association with local contrast transformation it provides image quality enhancement. The effectiveness of proposed approach is illustrated with examples.
PL
Zaprezentowano nową klasę logicznych układów programowalnych typu MAXOII firmy Altera, zaliczaną przez producenta do struktur CPLD. Na tle architektury "klasycznych" układów CPLD wyszczególniono najważniejsze nowatorskie rozwiązania wprowadzone przez firmę Altera do architektury układów MAX® II, umożliwiające efektywniejsze wykorzystanie ich przez użytkownika.
EN
In this paper a new logic class of programmable MAX II chips by Altera is described. This class of chips is numbered among CPLD structures. The most important, state-of-the art MAX II features in comparison with "classical" CPLD architectures were presented. This features in a large extent enables more effective use of this class CPLD chips.
6
Content available remote Reduction in the number of LUT elements for control units with code sharing
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EN
Two methods are proposed targeted at reduction in the number of look-up table elements in logic circuits of compositional microprogram control units (CMCUs) with code sharing. The methods assume the application of field-programmable gate arrays for the implementation of the combinational part of the CMCU, whereas embedded-memory blocks are used for implementation of its control memory. Both methods are based on the existence of classes of pseudoequivalent operational linear chains in a microprogram to be implemented. Conditions for the application of the proposed methods and examples of design are shown. Results of conducted experiments are given.
EN
This paper presents a novel method to overcome problems of finite set-model-based predictive torque control (MPTC) which has received a lot of attention in the last two decades. Tuning the weighting factor, evaluating a large number of switching states in the loop of the predictive control, and determining the duty cycle are three major challenges of the regular techniques. Torque and flux responses of deadbeat control have been developed to overcome these problems. In our method, firstly, the prediction stage is performed just once. Then, both the weighted cost function and its evaluation are replaced with only simple relationships. The relationships reduce torque ripple and THD of stator current compromisingly. In the next step, the length of the virtual vector is used to determine the duty cycle of the optimum voltage vector without any additional computations. The duty ratio does not focus on any relation or criteria minimizing torque or flux ripple. As a result, torque and flux ripples are reduced equally. The proposed duty cycle is calculated by using a predicted virtual voltage vector. Hence, no new computation is needed to determine the proposed duty cycle. Simulation and experimental results confirm both the steady and dynamic performance of the proposed method in all speed ranges.
PL
W artykule przedstawiona została metoda syntezy umożliwiająca zmniejszenie liczby tablic LUT potrzebnych do realizacji układu mikroprogramowanego z współdzieleniem kodów. Metoda jest przeznaczona dla układów FPGA z osadzonymi blokami pamięci. Część kombinacyjna układu mikroprogramowanego jest realizowana z użyciem tablic LUT, natomiast pamięć sterująca z użyciem osadzonych bloków pamięci. Redukcję liczby tablic LUT osiągnięto dzięki wykorzystaniu klas łańcuchów pseudorównoważnych. W artykule przedstawiono przykład zastosowania proponowanej metody oraz rezultaty eksperymentów.
EN
The paper presents new research results of synthesis of Composi-tional Microprogram Control Unit (CMCU) with Codes Sharing. The method allows reduction of look-up table elements in the combina-tional part of the control unit. The method assumes application of field-programmable gate arrays for implementation of the combinational part, whereas embedded-memory blocks are used for implementation of its control memory. Programmable logic devices are nowadays widely used for implementation of Control Units (CU) [16, 18]. The problem of the CU optimisation is still actual in computer science and it solution permits to decrease the cost of the system [17]. The proposed method is oriented on reduction of hardware amount of CMCU addressing circuit by placing codes of classes of pseudoequivalent states in the control memory. These classes are formed by division of the set of Operational Linear Chains (OLC) into partitions which correspond to pseudoequivalent states of Moore FSM [4]. The research results show that application of the method to tested control algorithms gives on average 50% decrease in hardware amount when compared to CMCU based structure (Tab. 2). The results were obtained using Xilinx ISE. The models of control units were generated by the authors' software using the control algorithms from [15].
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