The paper presents application called FIReWORK, that allows for automatic creation of the VHDL hardware structures of FIR filters. Automatically generated specialized hardware solutions dedicated to the FPGA and ASIC are commonly known as Intellectual Property Cores. The essential future of the application is easy initialization of FIR filter parameters in GUI, and then automatically design, calculate and generate the IP Core structure of the filter. The hardware realization is based on the Residue Number System, as a main arithmetic. Current structure of the application, the main objectives of the project, design assumptions and benefits are discussed.
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