This paper presents a basic aspects of structural design of the highperformance processor for implementation of discrete fractional Fourier transform (DFrFT). The general idea of the possibility of parallelizing the calculation of the so-called “true” discrete Fourier transform on the basis of our previously developed algorithmic approach is presented. We specifically focused only on the general aspects of the organization of the structure of such a processor, since the details of a particular implementation always depend on the implementation platform used, while the general idea of constructing the structure of the processor remains unchanged.
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The Fractional Fourier transform (FRFT) is a relatively novel linear transforms that is a generalization of conventional Fourier transform (FT). FRFT can transform a particular signal to a unified time-frequency domain. In this survey, we try to present a comprehensive investigation of FRFT. Firstly, we provided definition of FRFT and its three discrete versions (weighted-type, sampling-type, and eigendecomposition-type). Secondly, we offered a comprehensive theoretical research and technological studies that consisted of hardware implementation, software implementation, and optimal order selection. Thirdly, we presented a survey on applications of FRFT to following fields: communication, encryption, optimal engineering, radiology, remote sensing, fractional calculus, fractional wavelet transform, pseudo-differential operator, pattern recognition, and image processing. It is hoped that this survey would be beneficial for the researchers studying on FRFT.
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