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TSMC: A PEST Analysis of Semiconductor Market

100%

Lavdari F.

Journal of Geography, Politics and Society

2023

tom 13

nr 1

22-29

With the advent of the pandemic and the outbreak of individuality in inter-state politics, semiconductors, products that have become widely used by high-tech companies, have led to an increase in worldwide demand. But growing nationalism has led nations not to cooperate on the successful joint and equitable growth of these innovative technologies. This research analyses through a PEST analysis the political, economic, social and technological consequence of these choices for the largest semiconductor company, TSMC. The results show how, to date, the international chessboard poses four choices facing TSMC’s future, each based on how nations will approach future collaborative choices.

Automation of CMOS technology migration illustrated by RGB to YCrCb analogue converter

63%

Naumowicz M. , Melosik M. , Katarzynski P. , Hankiewicz A.

Opto-Electronics Review

2013

tom Vol. 21, No. 3

326-331

The paper illustrates a practical example of technology migration applied to the colour space converter realized in CMOS technology. The element has analogue excitation and response signals expressed in current mode. Such converter may be incorporated into an integrated vision sensor for preconditioning acquired image data. The idea of a computer software tool supporting the automated migration and design reuse is presented as the major contribution. The mentioned tools implement the Hooke-Jeeves direct search method for performing the multivariable optimization. Our purpose is to ensure transferring the circuit between usable fabrication technologies and preserving its functional properties. The colour space converter is treated as the case study for performance evaluation of the proposed tool in cooperation with HSPICE simulation software. The original CMOS technology files for Taiwan semiconductor (TSMC) plant were utilized for the research. The automated design migration from 180 nm into 90 nm resulted with obtaining compact IC layout characterized by a smaller area and lower power consumption. The paper is concluded with a brief summary that proves the usability of the proposed tool in designing CMOS cells dedicated for low power image processing.