The electronic properties of ZrO₂/SiO₂ stacked dielectric layers are reported as a function for temperature of the atomic layer deposition process. A dielectric layer has been characterized by C-V and I-V measurements of MIS structures. A strong dependence of κ value of ZrO₂ layer has been observed as a function of deposition temperature T. The values within the range of κ≈16-26 have been obtained. All measured stacked dielectric layers show an increase in dielectric breakdown voltage compared to simple SiO₂ dielectric by average factor of 1.7 and factor of 2 (21 MV/cm) for high-κ oxides deposited at low temperature (85°C).
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We witness a new revolution in electronic industry - a new generation of integrated circuits uses as a gate isolator HfO_{2}. This high-k oxide was deposited by the atomic layer deposition technique. The atomic layer deposition, due to a high conformality of deposited films and low growth temperature, has a large potential to be widely used not only for the deposition of high-k oxides, but also of materials used in solar cells and semiconductor/organic material hybrid structures. This opens possibilities of construction of novel memory devices with 3D architecture, photovoltaic panels of the third generation and stable in time organic light emitting diodes as discussed in this work.
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Zinc oxide films dedicated for hybrid organic/inorganic devices have been studied. The films were grown at low temperature (100°C, 130C and 200°C) required for deposition on thermally unstable organic substrates. ZnO layers were obtained in atomic layer deposition processes with very short purging times in order to shift a structure of the films from polycrystalline towards amorphous one. The correlation between atomic layer deposition growth parameters, a structural quality and electrical properties of ZnO films was determined.
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We report on AlGaN/GaN quantum point contacts fabricated by using e-beam lithography and dry ion etching. The tunable nano-constrictions are defined by the integration of side and top gates in a single device. In this configuration, the planar gates are located on the both sides of a quantum channel and the metallic top gates, which cover the active region, are separated from the substrate by an insulating and passivating layers of HfO_2 or Al_2O_3/HfO_2 composite. The properties of devices have been tested at T = 4.2 K. For side gates we have obtained a very small surface leakage current I_g< 10^{-11} A at gate voltages |V_g| < 2 V, however, it is not enough to close the quantum channel. With top gates we have been able to reach the pinch-off voltage at V_g = - 3.5 V at a cost of I_g ≈ 10^{-6} A, which has been identified as a bulk leakage current.
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We report on an extensive structural and electrical characterization of undergate dielectric oxide insulators Al_2O_3 and HfO_2 grown by atomic layer deposition. We elaborate the atomic layer deposition growth window for these oxides, finding that the 40-100 nm thick layers of both oxides exhibit fine surface flatness and required amorphous structure. These layers constitute a base for further metallic gate evaporation to complete the metal-insulator-semiconductor structure. Our best devices survive energizing up to ≈ 3 MV/cm at 77 K with the leakage current staying below the state-of-the-art level of 1 nA. At these conditions the displaced charge corresponds to a change of the sheet carrier density of 3 × 10^{13} cm^{-2}, which promises an effective modulation of the micromagnetic properties in diluted ferromagnetic semiconductors.
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Applicability of thin HfO_2 films as gate dielectric for SiC MOSFET transistor is reported. Layers characterisation was done by means of atomic force microscopy and scanning electron microscopy, spectroscopic ellipsometry and C-V and I-V measurements of MIS structures. High permittivity dielectric layers were deposited using atomic layer deposition. Investigation showed high value of κ = 15 and existence of high density surface states (5 × 10^{12} eV^{-1} cm^{-2}) on HfO_2/SiC interface. High leakage current is caused probably due to low conduction band offset between hafnium oxide and silicon carbide.
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