Warianty tytułu
Języki publikacji
Abstrakty
The paper presents a mixed HDL-A/VHDL model of an oversampling sigma-delta analog-to-digital converter created on the behavioural hierarchy level. The model of the analog part is coded in HDL-A and includes only necessary parameters that enable to determine the potential resolution of the converter. The model of the digital part is described in the synthesizable subset of VHDL and parameterized according to the word length and the type of arithmetic applied. Simulation results enclosed prove the efficiency of the design approach presented.
Czasopismo
Rocznik
Tom
Strony
120-127
Opis fizyczny
Bibliogr. 6 poz., rys., wykr.
Twórcy
autor
autor
autor
- Institute of Electron Technology, Al. Lotników 32/46, 02-668 Warsaw, Poland, rbar@ite.waw.pl
Bibliografia
Typ dokumentu
Bibliografia
Identyfikatory
Identyfikator YADDA
bwmeta1.element.baztech-article-PWA3-0030-0023