Warianty tytułu
Konferencja
Symposium "Diagnostic and Yield : SOI-Materials, Devices and Characterization" (4 ; 22-24.04.1998 ; Warsaw, Poland)
Języki publikacji
Abstrakty
The <100> oriented n-type Si wafers of the diameter of 2 inches with resistivity of p = 6 ÷ 9 Ω ⋅ cm covered by 100nm SiO₂ film were subjected to 100 keV₂⁺ ion implantation with dose of 5 ÷ 6⋅10¹⁶H/cm². After implantation Si wafers were bonded with unimplantae oxidized (100nm SiO₂) Si substrates. In some cases surface oxide was removed from implanted wafers before wafer bonding. Exfoliation was performed in air during 1 h annealing at about 650°C. Some samples were subjected to the second step of the annealing at 1100°C for 1 h in Ar atmosphere. The exfoliated surface roughness estimated from AFM and profilometric measurements is about 20 ÷ 30 nm. Defect level in the crystal lattice was determined by RBS/channelling techique. The exfoliation process at 650°C leads to a defected surface layer. After annealing at 1100°C almost all defects in the SOI body generated by ion implantation and splitting formation are annealed out. The C-V characteristics of MOS capacitors prepared from materials annealed at 650°C indicate a presence of an electric charge built in the SOI structure. The results presented here show that high temperature annealing is indispensable for improving parameters of Silicon-On-Insulator (SOI) material.
Słowa kluczowe
Czasopismo
Rocznik
Tom
Strony
138-141
Opis fizyczny
Bibliogr. 11 poz.
Twórcy
autor
autor
autor
autor
autor
autor
- Institute of Electronic Materials Technology, ul. Wólczyńska 133, 01-919 Warszawa, Poland
Bibliografia
Typ dokumentu
Bibliografia
Identyfikatory
Identyfikator YADDA
bwmeta1.element.baztech-article-BWA1-0001-0452