Department of Integrated Circuits' and Systems' Design

• Autorzy: Szynka, J.
• Języki publikacji: EN

Słowa kluczowe

PL

Instytut Technologii Elektronowej; działalność naukowo-badawcza

EN

Institute of Electron Technology; scientific activity

• Czasopismo: Prace Instytutu Technologii Elektronowej
• Rocznik: 2008
• Tom: z. 1/2
• Strony: 115-124
• Opis fizyczny: Bibliogr. 21 poz.

Twórcy

autor

Szynka, J.

• Institute of Electron Technology, Al. Lotników 32/46, 02-668 Warsaw, Poland,

Bibliografia

• [P1] JANCZYK G., BIENIEK T., JANUS P., KOCIUBIŃSKI A., GRABIEC P., SZYNKA J., REITZ S., SCHNEIDER P., KAULFRESCH E., WEBER J.: Integrated Thermo-Electro-Mechanical Modeling of 3D E-CUBES Structures. Proc. of the 14th Int. Conf. Mixed Design of Integrated Circuits and Systems MIXDES 2007. Ciechocinek, Poland, 21-23.06.2007, IEEE, Łódź, Poland, 2007 p. 297-300.
• [P2] JAROSZ A., PFITZNER A.: Verification of the Model of Interconnection Capacitances Depedence on Further Neighbourhood in the Bus-Microscopic and Electrical Measurements. Proc. of 9th Int. Verional Conf.: The Experience of Designing and Application of CAD Systems in Microelectronics CADSM'2007. Polyana, Ukraine, 20-24.02.2007.
• [P3] JAROSZ A., PFITZNER A.: Accuracy of Analytical Evaluation of Interconnection Capacitances in Crossing Buses. Proc. of the 14th Int. Conf. Mixed Design of Integrated Circuits and Systems MIXDES 2007. Ciechocinek, Poland, 21-23.06.2007, IEEE, Łódź, Poland, 2007 p. 69-73.
• [P4] KOŁODZIEJSKI J. F., SZCZĘSNY J., SZERMER M., DANILUK T.: Investigations of Integrated Circuits Immunity to EM Pulse Disturbances. Prz. Elektrotechn. 2007 vol. 83 no. 9 p. 18-20 (in Polish).
• [P5] KURJATA-PFITZNER E., SZYMAŃSKI A., LESIŃSKI J.: Some Practical Aspects of Integrated 2.4 GHz Quadrature VCO Design. Proc. of the 14th Int. Conf. Mixed Design of Integrated Circuits and Systems MIXDES 2007. Ciechocinek, Poland, 21-23.06.2007, IEEE, Łódź, Poland, 2007 p. 339-343.
• [P6] MALINOWSKI A., GRABIEC P., GRODNER M., KUCHARSKI K., TOMASZEWSKI D., JAKUBOWSKI A.: Analysis of the Technological Processes Dispersion Based on Electrical Measurements of Test Structures. Proc. of the IX Sci. Conf. "Electron Technology" ELTE 2007, Kraków, Poland, 4-7.09.2007.
• [P7] OBRĘBSKI D., KUCHARSKI K., GRODNER M., KOKOSZKA A., MALINOWSKI A., LESIŃSKI J., TOMASZEWSKI D., MALESIŃSKA J.: Development of MPW Service for Academies Based on ITE Proprietary CMOS Process. Proc. of the 14th Int. Conf. Mixed Design of Integrated Circuits and Systems I MIXDES 2007. Ciechocinek, Poland, 21-23.06.2007, IEEE, Łódź, Poland, 2007 p. 69-73.
• [P8] SZCZĘSNY J., KOŁODZIEJSKI J. F.: Influence of Discontinuity of Strip Lines on Signal Integrity and Electromagnetic Compatibility. Prz. Elektrotechn. 2007 vol. 83 no 9 p. 34-36 (in polish)
• [P9] SZCZĘSNY J., KOŁODZIEJSKI J. F.: EM Emission of ICs Implemented in FPGA - Influence of Floor Plan and Electric Function. Electron Technol. - Internet J. 2007 vol. 39 no. 4 p. 1-7. www.ite.waw.pl/etij.
• [C1] BIENIEK T., GRABIEC P., JANCZYK G., SZYNKA J.: Design of Heterogeneous Systems Using Network Analogies. Electrothermomechanical Modeling for ASIC/MEMS Co-Simulation. Conf. INTEL 12th EMEA Academic Forum. Budapest, Hungary, 12-14.06.2007 (poster).
• [C2] BIENIEK T., GRABIEC P., JANCZYK G., SZYNKA J.: Design of Integrated IC+MEMS Systems-Modeling and Simulation Topics. TU Alumni-Expertenseminar. Dresden, Germany, 5-10.11.2007 (inv. lect).
• [C3] JAROSZ A., PFITZNER A.: Verification of the Model of Interconnection Capacitances Depedence on Further Neighbourhood in the Bus-Microscopic and Electrical Measurements. 9th Int. Verional Conf: The Experience of Designing and Application of CAD Systems in Microelectronics CADSM'2007. Polyana, Ukraine, 20-24.02.2007 (paper).
• [C4] JAROSZ A., PFITZNER A.: Accuracy of Analytical Evaluation of Interconnection Capacitances in Crossing Buses. 14th Int. Conf. Mixed Design of Integrated Circuits and Systems MIXDES 2007. Ciechocinek, Poland, 21-23.06.2007 (poster).
• [C5] KOŁODZIEJSKI J. F., DANILUK T., SZERMER M., SZCZĘSNY J.: Investigations of Integrated Circuits Immunity to EM Pulse Disturbances. V Dom. Symp. "Electromagnetic Compatibility in Electrotechnics and Electronics". Łódź, Poland, 4-5.10.2007 (paper, in Polish).
• [C6] KURJATA-PFITZNER E., SZYMAŃSKI A., LESIŃSKI J.: Some Practical Aspects of Integrated 2.4 GHz Quadrature VCO Design. 14th Int. Conf. Mixed Design of Integrated Circuits and Systems MIXDES 2007. Ciechocinek, Poland, 21-23.06.2007 (poster).
• [C7] MALINOWSKI A., GRABIEC P., GRODNER M., KUCHARSKI K., TOMASZEWSKI D., JAKUBOWSKI A.: Analysis of the Technological Processes Dispersion Based on Electrical Measurements of Test Structures. IX Sci. Conf. "Electron Technology" ELTE 2007. Kraków, Poland, 4-7.09.2007 (poster).
• [C8] PIĄTEK Z., KOŁODZIEJSKI J. F., PLESKACZ W. A.: ESD Failures of Integrated Circuits and Their Diagnostics Using Transmissions Line Pulsing. 10th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems. Kraków, Poland, 11-13.04.2007 (paper).
• [C9] OBRĘBSKI D., KUCHARSKI K., GRODNER M., KOKOSZKA A., MALINOWSKI A., LESIŃSKI J., TOMASZEWSKI D., MALESIŃSKA J.: Development of MPW Service for Academies Based on ITE Proprietary CMOS Process. 14th Int. Conf. Mixed Design of Integrated Circuits and Systems. Ciechocinek, Poland, 21-23.06.2007 (paper).
• [C10] SZCZĘSNY J., KOŁODZIEJSKI J. F.: Influence of Discontinuity of Strip Lines on Signal Integrity and Electromagnetic Compatibility. V Dom. Symp. "Electromagnetic Compatibility in Electrotechnics and Electronics". Łódź, Poland, 4-5.10.2007 (paper, in Polish).
• [PA1] KOŁODZIEJSKI J. F., MAGDZIAK R.: Power Supply with Galvanically Separated Half-Bridge Converter. Pat. RP no. 196206 (in Polish).
• [PA2] SZCZĘSNY J., JABŁOŃSKI W.: Monolithic Integrated Circuit. Pat. RP no. 194768 (in Polish).