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and elimination of upgrade requirements, has become the prevalent choice for microprocessor built-in cache memory, game software, computers, and workstations. Consequently, its widespread adoption in portable handheld devices is evident. Adiabatic logic emerges as a promising approach to enhance energy recovery capacity and curtail power dissipation in these circuits, & it allows VLSI circuits to recycle utilised power. In the Adiabatic SRAM good high degree of power reduction is observed. By applying the aforementioned technique same SRAM is investigated by varying technology. In this study, the power values of adiabatic SRAM cells & standard SRAM cells are compared. In contrast to the conventional SRAM cell which is 6T CMOS type, adiabatic logic exhibits superior power and energy efficiency. Leveraging the Cadence® EDA environment, the SRAM cell was meticulously designed, followed by a comprehensive assessment of power and energy consumption across conventional 90nm and 45nm technologies, alongside adiabatic logic in 45nm technology.
zużycie energii, niskie napięcie zasilania i eliminacja wymagań dotyczących aktualizacji, stała się powszechnym wyborem w przypadku wbudowanej pamięci podręcznej mikroprocesora, oprogramowania do gier, komputerów i stacji roboczych. W związku z tym oczywiste jest jego powszechne zastosowanie w przenośnych urządzeniach przenośnych. Logika adiabatyczna okazuje się obiecującym podejściem do zwiększania zdolności odzyskiwania energii i ograniczania jej rozpraszania w tych obwodach, a także umożliwia obwodom VLSI recykling wykorzystanej mocy. W adiabatycznej pamięci SRAM obserwuje się dobry, wysoki stopień redukcji mocy. Stosując wspomnianą technikę, bada się tę samą pamięć SRAM przy użyciu różnych technologii. W tym badaniu porównano wartości mocy adiabatycznych komórek SRAM i standardowych komórek SRAM. W przeciwieństwie do konwencjonalnych ogniw SRAM typu 6T CMOS, logika adiabatyczna charakteryzuje się wyższą mocą i efektywnością energetyczną. Wykorzystując środowisko Cadence® EDA, szczegółowo zaprojektowano ogniwo SRAM, po czym przeprowadzono kompleksową ocenę mocy i zużycia energii w konwencjonalnych technologiach 90 nm i 45 nm, wraz z logiką adiabatyczną w technologii 45 nm
quasi-optical emitter-detector pairs operating in the 200–266 GHz range with the input power-related signal-to-noise ratio reaching 70 dB for 1 Hz-equivalent noise bandwidth. The applicability of these compact devices for a variety of applications including imaging, spectroscopy or wireless communication links was also demonstrated.
devices degrades at lower technology nodes. In sub-14 nm technology, FinFETs have greater control over a gate and outperform CMOS designs. FinFET devices feature a greater Ion current and better extensibility than typical CMOS devices. The quasi planar FinFET structure's simple production technique drew a lot of attention. Static leakage current is decreased by up to 90%, and it is more compact. Because of its area of performance, reduced leakage power, intra-die variability, and lower retention voltages, it is employed more than other FETs in SRAM cell design. In this work, an 8-bit SRAM is built and made in FinFET 14nm, the time delay for read and write operations are computed, as well as the leakage power for the design, and the performance is compared to existing technology.
w węzłach o niższej technologii. W technologii poniżej 14 nm FinFET mają większą kontrolę nad bramką i przewyższają konstrukcje CMOS. Urządzenia FinFET charakteryzują się większym prądem jonów i lepszą rozciągliwością niż typowe urządzenia CMOS. Prosta technika produkcji quasi-planarnej struktury FinFET przyciągnęła wiele uwagi. Statyczny prąd upływu jest zmniejszony nawet o 90% i jest bardziej kompaktowy. Ze względu na swój obszar działania, zmniejszoną moc upływu, zmienność wewnątrz matrycy i niższe napięcia retencji, jest on stosowany częściej niż inne tranzystory FET w projektowaniu ogniw SRAM. W tej pracy zbudowano i wykonano 8-bitową pamięć SRAM w technologii FinFET 14nm, oblicza się opóźnienie czasowe dla operacji odczytu i zapisu, a także moc upływu dla projektu, a wydajność porównuje się z istniejącą technologią.
Semi 0.35µm C035U 5M. Przedstawiono zmodyfikowany model matematyczny oscylatora, jego implementację CMOS i sieć synchronizowanych oscylatorów. Wykonano symulacje tych układów dla modeli tranzystora MOS „typical”, „slow” i „fast” dla dwóch temperatur.
mathematical oscillator model, its CMOS implementation and synchronized oscillators network have been described. These CMOS circuits simulations using „typical”, „slow” and „fast” MOS transistor models for two temperatures have been performed.
all-pass filter that the transfer functions of the filter can be selected by choosing appropriate current output without any component matching conditions. The natural frequency and quality factor of all filtering functions can be controlled electronically and orthogonally using the bias currents of transconductance amplifiers. The active and passive sensitivities of the filters are low. The proposed filter has been simulated using 0.18 µm CMOS process from TSMC. PSPICE simulation results are included to confirm workability of the proposed circuits.
dolnoprzepustowy, górnoprzepustowy, pasmowoprzepustowy, pasmowy i wszechprzepustowy, dzięki czemu funkcje przenoszenia filtra można wybrać poprzez wybór odpowiedniego wyjścia prądowego bez żadnych warunków dopasowania komponentów . Naturalną częstotliwość i współczynnik jakości wszystkich funkcji filtrowania można kontrolować elektronicznie i ortogonalnie za pomocą prądów polaryzacji wzmacniaczy transkonduktancyjnych. Aktywna i pasywna czułość filtrów jest niska. Proponowany filtr został zasymulowany przy użyciu procesu CMOS 0,18 µm firmy TSMC. Zawarto wyniki symulacji PSPICE, aby potwierdzić wykonalność proponowanych obwodów.
conveyor analogue switch. The proportional gain, integral time constant and derivative time constant can be controlled electronically using transconductance amplifiers of CCTA. Unlike previous analogue PID controllers, variant P, I, D, PI, PD and PID controllers of this circuit can be programmed by using bias currents without changing any input and output connections. The proposed structure is highly suitable for integrated circuit (IC) implementation by using only grounded passive comments. The proposed programmable PID controller circuits have been simulated using 0.18 µm CMOS process. The simulation results are used to confirm the workability of the proposed circuits. Additionally, the performance evaluation of the proposed programmable PID controller circuit is verified by unit step input for a close-loop system with the second-order low-pass filter in the plant.
działa jako przełącznik analogowy konwojera prądu. Wzmocnienie proporcjonalne, stała czasowa całkowania i stała czasowa różniczkowania mogą być sterowane elektronicznie za pomocą wzmacniaczy transkonduktancyjnych CCTA. W przeciwieństwie do poprzednich analogowych regulatorów PID, warianty regulatorów P, I, D, PI, PD i PID tego obwodu mogą być programowane przy użyciu prądów polaryzacji bez zmiany jakichkolwiek połączeń wejściowych i wyjściowych. Proponowana struktura jest wysoce odpowiednia do implementacji układu scalonego (IC) przy użyciu tylko uziemionych pasywnych komentarzy. Zaproponowane układy programowalnych sterowników PID zostały zasymulowane przy użyciu procesu 0,18 µm CMOS.
IC. The causes of this self-oscillation event contribute to the failure of other parts of the circuit. This paper presents countermeasures for self-oscillation of the capacitor open-circuit self-oscillation in a CMOS Schmitt trigger-invertor oscillator circuit for a fail-safe relay drive. The proposed circuit replaces a normal 2-pin capacitor with a special 4-pin designed capacitor which connects a parallel resistor between the input CMOS inverter and the ground source. This paper carried out experimentation using Failure Modes and Effects Analysis (FMEA).The results showed that the output logic was high when the circuit had an open fault. Thus, the new designed circuit had no fail-dangerous occurrences.
operation with its specific features, to selectively obtain either low-energy or high-performance. The sub-threshold region DML achieves minimum-energy. However, sub-threshold region consequence in performance is enormous. In this paper, the working of DML model in the moderate inversion region has been explored. The near-threshold region holds much of the energy saving of subthreshold designs, along with improved performance. Furthermore, robustness to supply voltage and sensitivity to the process temperature variations are presented. Monte carol analysis shows that the projected near-threshold region has minimum energy along with the moderate performance.
of this solution. The article gives examples of some hints, regarding radiation coupling and readout systems. It shows that silicon CMOS technology is well adapted to the production of inexpensive imaging systems for sub-THz frequencies. As an example paper presents the demonstrator of a multipixel Si-CMOS THz spectroscopic system allowing for chemical identification of lactose. The THz detectors embedded in this system were manufactured using the CMOS process.
decoding on one side vs. presence of high frequency harmonics in transmitted signals on the other makes some designers choose approach in which trapezoidal waveforms are used instead of rectangular ones. Moreover, edges of trapezoidal waveforms are additionally rounded to further limit presence of higher harmonics and thus to comply to EMI regulations and requirements. The paper proposes a solution based on a reimplementation of a high-voltage structure already proposed by the author, but implemented with use of different semiconductor technology process. Utilization of this new process and devices available in this technology makes possible significant increase of the circuit operation quality.
voltage offsets, power consumption, response delay, and input-referred noise in terms of its dimensioning and biasing. The final circuit occupies 5×5 μm2 of area, consumes 17.1 fJ for single comparison with 250 ps of propagation delay, and allows to work with 4 GHz clock signal.
current, the proposed building block is then called “The Second-Generation Electronically-tunable Current-controlled Current Conveyor” (ECCCI). The applications are demonstrated in form of both 2 quadrant and 4 quadrant current-mode signal multiplier circuits. Characteristics of the proposed ECCCII and its application are simulated by the PSPICE program from which the results are proved to be in agreement with the theory.
matryc CCD i CMOS wynikające m.in. z ich struktury i rodzaju. Ponadto omówiono obszary aplikacyjne matryc światłoczułych, zwracając jednocześnie uwagę na wpływ danego zastosowania i wymaganych parametrów na wybór: CMOS czy CCD.
resemblances of CCD and CMOS matrices resulting among others from their structure and the kind were analysed. Moreover appliqué areas of were discussed, simultaneously considering the influence of the given application and required parameters on choice: CMOS or CCD.
of halogen and LED lamps, used as a source of illumination in the measuring system, was carried out. Findings: In the course of experimental studies, the sensitivity and resolution of fixing defects of adhesive joints of optical parts were increased and the measurement error was reduced from 10 ± 1.2 microns to 10 ± 0.3 microns. Research limitations/implications: The limitations of the accuracy of the measurement are 10 ± 0.3 microns of adhesive defects, since the studies were conducted on separate samples of glues that did not cover all adhesives for the connection of optical surfaces and the thickness of glass surfaces was 1 mm and 2 mm. Practical implications: With the application of the lighting system approach described in the article, it is possible to improve any optoelectronic measuring system, thereby increasing the accuracy of the measurement. Originality/value: The originality of the results of the article is the experimental data of the studies of light-technical characteristics of the halogen lamp, which is used in the optoelectronic measuring system.
reduction the converter input resistance and decrease of the required supply voltage. Improvements in the considered converter results not only from the reduction of the number of the used transistors but also from the proposed realization of the feedback loop. In this way, it was possibly to get a strong loop gain. As a results, the achieved minimum supply voltage has been reduces from 2V, in case of the previous published converter version, to as low level as 1.2 V, in the case of the newly proposed solution. As for the linearity of the C-V transfer function, apart from its strong loop gain, an important role play also output transistors operating in a small drain to source region (linear region). Working in this region, one obtains a quasi linear voltage to current relationship. The theoretical and simulation results are in a good agreement and are promising.
with an equal ground resolution. The two stitched images form a large frame with 16,470 pixels across the flight line and 11,570 pixels along the flight providing 190 MP image. The total FOV across flight line is 45.7 deg and FOV along flight line is 33 deg. Productivity analysis for aerial survey cameras may be expressed as an aerial survey productivity (image coverage per hour of flight), distance between flight lines, time required to fly AOI (Area of Interest), or number of flight lines per AOI. The new iXU-RS1900 camera enables an increase in the distance between flight lines and improves aerial survey productivity by 43%. It needs only 34 min of flight to cover the central area of most cities in Europe. Thus, with the new CMOS sensor and short exposure time, high quality aerial imagery may be reached without using an FMC technique.
rozdzielczość terenową zdjęć. Dwa połączone obrazy tworzą kadr o 16 470 pikselach w poprzek i 11 570 pikselach wzdłuż lotu, łącznie o rozdzielczości 190 Mpix. Odpowiada to kątom widzenia 45.7 i 33 odpowiednio w poprzek i wzdłuż lotu. Analiza wydajności kamer lotniczych może być wyrażana jako wydajność obrazowania (powierzchnia kryta zdjęcia na godzinę lotu), odległość między szeregami, czas lotu konieczny na pokrycie obszaru zainteresowania, czy liczbą szeregów na takim obszarze. Nowa kamera iXU-RS190 umożliwia zwiększenie odległości między szeregami i poprawia wydajność o 43%. Potrzebuje tylko 34 minuty lotu na pokrycie centralnej części większości miast europejskich. Z nowym przetwornikiem CMOS i krótkimi ekspozycjami wysoka jakość zdjęć lotniczych może być osiągnięta bez konieczności stosowania technik kompensacji rozmazania (FMC).
significantly by improving the efficiency of the extinguishing action by fire suppression. Water mist fire suppression system, Water mist fire extinguisher, fire hydrant are some of the commonly available methods for fire extinguishment process. This paper is about investigation on ultrasonic frequency for water mist generation without pressurized system. Design/methodology/approach: This technique helps reduce the usage of water required for fire extinguishment to a minimum level. Here H-bridge circuit has been designed with piezoelectric transducer which will operate at various frequency range (0 to 3 MHz). The developed model has been used to predict the minimum frequency required for water mist formation, which is about 2 MHz. Findings: An electrical circuit with h-bridge circuit and piezoelectric transducer has been specifically designed for water mist formation using ultrasonic vibrator has been fabricated. It is a tunable frequency circuit. The tunable frequency range various up to maximum of 3 MHz. From the above experimentation it has been identified that minimum 2 MHz Frequency is required for water mist formation in the water reservoir. Future research in this technique for water mist formation with high rating and increase in number of PET could provide better results. Fine water droplet is also possible with high rating frequency. Research limitations/implications: The developed model has been used to predict the minimum frequency required for water mist formation, which is about 2 MHz. These results will be useful in optimizing the water mist suppression system by varying the frequency and distance from the flame.
częstotliwościowej z uwzględnieniem eliminacji zjawiska offsetu w odpowiedzi czasowej analogowych układów scalonych. Procedura projektowania bazuje na algorytmie Hooke'a-Jeeves'a zmodyfikowanym pod kątem optymalizacji dyskretnej. Wyniki przedstawiono dla pary filtrów piątego rzędu pracującej w trybie przełączanych prądów. Otrzymane rezultaty niemal całkowicie pokrywają się z charakterystykami idealnymi, świadcząc o skuteczności zaproponowanej metody optymalizacji.
to the offset elimination in the time response of analog integrated circuits is presented. The procedure is based on the Hooke- Jeeves algorithm modified for discrete optimization. The results are shown for a fifth-order filter pair operating in the switched current mode. The results almost completely coincide with the ideal frequency response, demonstrating the effectiveness of the proposed optimization methods.
and cheap in production. Despite its simplicity, the rectifier has relatively good characteristics, the voltage and power efficiency, and bandwidth greater than 89%, 87%, and 1 GHz, respectively. The performed simulations and measurements of a prototype circuit fully confirmed its correct operation and advantages.
enables a voltage mode operation even if the transresistor is loaded by a not necessarily very high loading resistance. The obtained result is due to adding to the transresistor-input-stage a simple rail-to-rail voltage follower. The presented solution is an original proposal of the author. Input stage of the transresistor is built of only 4 MOS transistors and creates a simple quasi-linear current-to-voltage convertor. Output stage of it is built of 9 MOS transistors, plays a role of a very precise atypical voltage follower. In respect of simplicity and headroom, the proposed follower is better than conventional OA-based voltage followers. Preliminary simulation results are in a good agreement with the theory presented.
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