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EN
In this work we report on fabrication of quantum wires and quantum point contacts from the modulation doped CdMgTe/Cd(Mn)Te structures, with the application of a high-resolution electron-beam lithography. We emphasize on methods which were not yet utilized for these substrate materials. In particular, we describe the so-called shallow-etching approach, which allows for the fabrication of quantum constrictions of a physical width down to 100 nm, which are characterized by the smoother confining potential as compared to the deep-etched devices. For that purpose, a single-line exposure mode of electron-beam lithography has been used. We demonstrate also, how to combine the etching of separating grooves with the thermal evaporation of metal side-gates into a single post-processing stage of a quantum point contact fabrication. This article is an expanded version of the scientific reports presented at the International Conference on Semiconductor Nanostructures for Optoelectronics and Biosensors 2016 ICSeNOB2016, May 22–25, 2016, Rzeszow, Poland.
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EN
The main goal of the studies on epitaxial regrowth process of InP on patterned substrates is to gain knowledge about growth rates and interface quality on various areas to improve the fabrication technology for future applications. Prepared samples were measured at every step of the process by scanning electron microscope (SEM), optical microscope with dark field and phase contrast modes, atomic force microscope (AFM) and also using optical profilometer WLI (White Light Interferometer). Fabrication steps were divided into three main groups. First was the epitaxial growth of 5 µm thick InP layer. Next was patterning, which was made by applying a mask film on the epilayer. Shapes of the mesas after wet chemical etching with photoresist as a mask as well as the shapes of mesas slopes were irregular on the whole substrate area. These problems were solved by the use of silicon nitride mask. The mesas shapes and their slopes became then regular, independently of etching depth. Second fabrication step was etching of selected area. Couple of solutions were examined, but in details HCl:H3PO4 mixture in various proportions, which gave the best results in mesas shapes and orientations relative to the substrate. After that, the etching mask material was removed from the epilayer using a buffered hydrofluoric acid (BHF). The last step was epitaxial regrowth. To see how the epitaxial growth process was performed on different areas of patterned substrate it was suggested using a “sandwich”, which consisted of 50 layers of indium phosphide and indium gallium arsenide. This idea helped to understand the phenomena occurring during the epitaxial growth on that kind of substrate. The highest growth rate occurred on the top of the mesas and the lowest on their slopes. Described experiments are introduction to the studies on epitaxial growth of buried heterostructure (BH).
3
Content available remote Modelowanie 3-wymiarowe anizotropowego trawienia krzemu
PL
W artykule zostały przedstawione metody optymalizacji parametrów w programie Etch3D oraz wyniki symulacji trawienia krzemu w KOH w porównaniu ze strukturami próbnymi. Celem niniejszych badań była kalibracja parametrów symulatora do warunków procesów przeprowadzanych w ITE. Do analizy wpływu parametrów funkcji RPF (ang. Remove Probability Function) na parametry wyjściowe, zastosowano metodę Taguchiego. Pozwoliło to na optymalizację wyników symulacji do rzeczywistych procesów trawienia przeprowadzanych w ITE.
EN
The methods of parameters optimization in the program Etch3D and results of simulations of silicon etching in KOH in comparison with experiments are presented. The aim of this study was to calibrate the tool to a set of process conditions that is offered by ITE. The Taguchi approach [4] was used to analyze the influence of every RPF (Remove Probability Function) parameter on one or more output parameters. This allowed tuning the results of simulation to results of real etching performed at ITE.
PL
Postęp w dziedzinie wytwarzania urządzeń półprzewodnikowych i układów scalonych wynika głównie z procesu miniaturyzacji. W wyniku miniaturyzacji wzrasta wydajność oraz zmniejsza się pobór mocy zaawansowanych przyrządów elektronicznych. W chwili obecnej technologia fotolitografii jest podstawowym narzędziem pozwalającym wytwarzać zawansowane przyrządy półprzewodnikowe. Tworzenie przyrządów o rozmiarach poniżej 100 nm powoduje znaczne problemy technologiczne. Nanolitografia, technika mikroskopii bliskich oddziaływań, wykorzystująca proces lokalnej anodyzacji powierzchni, jest zaawansowaną techniką pozwalającą wytworzac wzory na powierzchni półprzewodnika. Ze względu na precyzyjną kontrolę procesu lokalna anodyzacja jest wszechstronną techniką pozwalającą wytwarzać wzory nanostruktur. Łącząc technikę nanolitografii z procesem mokrego trawienia można wytworzyć nanostruktury o szerokości linii poniżej 100 nm. Przedstawiona technologia może w niedalekiej przyszłości posłużyć do wytwarzania przyrządów elektroniki kwantowej.
EN
Rapid progress in fabrication of the semiconductor devices and integrated circuits is mainly due to miniaturization. As a result of the miniaturization process improved performance and reduced power consumption is introduced to high- end electronic devices. At the present state mainly photolithography tools are used for developing electronic devices. Fabrication of nanostructures below 100 nm regime by conventional photolithographic techniques leads to technological limitations. Nanolithography based on local anodic oxidation by atomic force microscopy is a promising technique for patterning nanostructures on silicon substrates. Due to its versatility and precise control, local anodic oxidation is suited for preparing well defined nanostructures. By the combination of nanolithography and wet etching, nanostructures with a line width below 100 nm may be fabricated. Presented technology could be used to fabricate quantum devices in the near future.
5
Content available remote Overview of etching technologies used for HgCdTe
EN
This review is an attempt to survey all the etching techniques that have been used since the very beginning stages of HgCdTe device fabrication to the most recent ones. Recent state of the art device architectures such as high-density focal plane arrays, avalanche photodiodes, two-colour and multispectral detectors require isolation of high aspect ratio trenches with least etch induced damage at the surface and sidewalls. The most widely used dry etching techniques are electron cyclotron resonance plasma and inductively coupled plasma processing. Almost all the etching technologies have been summarized from chemistry and device perspective.
6
Content available remote HBV deep mesa etching in InGaAs/InAlAs/AlAs heterostructures on InP substrate
EN
The chemical composition of newly developed anisotropic etching solution and several experimental results obtained with heterostructure barrier varactor (HBV) deep mesa formation are presented. The novel solution enables the deep etching of the InGaAs/InAlAs/AlAs heterostructure over InP substrate, up to 5 žm in the [100] crystal direction. It ensures etch-stop at the InP substrate and gives almost perfect surface quality, with mesa profiles meeting device design requirements. The etching solution is a mixture of two components: A (H2SO4:H2O2:H2O = 1:1:8) and B (C6H8O7:H2O = 1:1), in the proportion B:(H2O2 content in A) =1:1.
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