Electrosurgical generators (ESGs) are currently the most widely used surgical technology for clinical operations. The main disadvantage of ESGs is their output power is irregular due to the variable tissue impedance. The heat dissipation caused by the high amount of thermal energy generated leads to medical complications for both patient and surgeon. In this research, various inverter topologies and power controllers are investigated to specify the best structure that ensures best performance. The type of inverter topologies investigated are three level and five level, while the PID structures investigated are integer order (IO-PID) and fractional order (FO-PID). The simulation results indicate that FO-PID with five level inverters is better than IO-PID with three level inverters in terms of minimum heat dissipation rate and THD of the output voltage and current.
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In this paper, optimum switching angles are chosen from slime moiled algorithm (SMA), Artificial Bee Colony (ABC), Genetic algorithms (GA), Whale optimization algorithm (WOA), and Gray wolf algorithm (GWO). These angles are selected according to the lowest total harmonic distortion of output load voltage from reduced switches multilevel inverter. These algorithms are working together in a hybrid seduced to solve the nonlinear equation of switching angles determination. A 25-level inverter fed by isolated unequal PV panel as DC sources with reduced switches and sources is chosen for this study. Theoretical analysis and Simulation are accomplished using Matlab/Simulink for 25 level reduced switches multilevel inverter. The simulated results validated the practical outcomes.
PL
W niniejszym artykule optymalne kąty przełączania zostały wybrane spośród algorytmu śluzowatego (SMA), sztucznej kolonii pszczół (ABC), algorytmów genetycznych (GA), algorytmu optymalizacji wielorybów (WOA) i algorytmu szarego wilka (GWO). Kąty te są dobierane zgodnie z najniższymi całkowitymi zniekształceniami harmonicznymi napięcia obciążenia wyjściowego ze zredukowanych przełączników wielopoziomowych falowników. Algorytmy te współpracują ze sobą w hybrydzie, której celem jest rozwiązanie nieliniowego równania wyznaczania kątów przełączania. Do tego badania wybrano 25-poziomowy falownik zasilany przez izolowany nierówny panel fotowoltaiczny jako źródła prądu stałego o zredukowanych przełącznikach i źródłach. Analiza teoretyczna i symulacja są realizowane przy użyciu Matlab/Simulink dla 25 przełączników o zredukowanych poziomach wielopoziomowego falownika. Symulowane wyniki potwierdziły praktyczne wyniki.
This article proposes a novel three-phase inverter based on the concept of switched capacitors (SCs), which uses a single DC source. A three-phase, seven-level line-to-line output voltage waveform is synthesised by the proposed topology, which includes eight switches, two capacitors, and one diode per phase leg. The proposed topology offers advantages in terms of inherent voltage gain, lower voltage stresses on power switches, and a reduced number of switching components. Additionally, the switched capacitors are self-balanced, thereby eliminating the need for a separate balancing circuit. The proposed structure and its operating principle, the self-balancing mechanism of the capacitors, and the control strategy are all thoroughly explained in the article. The proposed topology has also been compared with some recent SC topologies. Lastly, the proposed topology has been shown to be feasible through simulation and experimentation.
The impedance network makes it possible to increase and decrease the voltage, which is not available in normal inverters (voltage and current sources).This paper presents a modified topology and modulation technique for a three-phase Modified Z-Source Neutral-Point Clamped (MZS-NPC) inverter. A modulation scheme for the proposed topology is designed based on maximum gain control method to achieve the maximum voltage gain by simple implementation and balancing the neutral point voltage of the dc link. In order to supply the desired voltage to the critical load in an islanded micro-grid, a closed-loop ac voltage controller is realized in fuel cell or photovoltaic applications based on the proposed inverter. The ability to reinforce and validity of topology operations and modulation techniques has been demonstrated by simulation. It should be noted that the simulations are implemented in MATLAB / Simulink software.
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This paper presents a new multilevel inverter topology which can generate all required numbers of levels at the output stage. The proposed topology is composed of six unidirectional switches, several bidirectional switches, and DC voltage sources. To add perspective, the proposed topology is compared with other topologies. The comparison shows that the proposed topology generates more voltage levels without the need for all excess number of switches and DC voltage sources. Moreover, the smaller number of switches in the current flow leads to decreased conductive loss in the proposed topology. To assure the proposed topology operates correctly, it is simulated with the aid of PSCAD/EMTDC software and the results are discussed.
This paper proposed a new voltage-boosting 13-level switched-capacitor (SC) cost-effective inverter. The proposed topology comprises fourteen transistors, three capacitors and a single DC source to produce a 13-level staircase waveform. The capacitor voltage balancing problem is inherently solved by the series/parallel technique. Structural description, working principle, calculation of optimum values of capacitance and modulation scheme are briefly described. The comparative analyses with the existing SC multilevel inverter (MLI) in terms of voltage gain, blocking voltage, total standing voltage (TSV), component per level factor and cost function illustrate the merits of the proposed topology. Further, simulation and experimental results at different loading conditions verify the feasibility of the proposed topology.
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This paper presents direct torque control based on artificial neural networks of a double star synchronous machine without mechanical speed and stator ux linkage sensors. The estimation is performed using the extended Kalman filter, which is known for its ability to process noisy discrete measurements. The proposed approach consists of replacing the switching tables with one artificial neural network controller. The output vector of the artificial neural network controller is directed to a multilevel switching table to decide which reference vector should be applied to control the two five-level diode-clamped inverters. This inverter topology has the inherent problem of DC-link capacitor voltage variations. Multilevel direct torque control based on a neural network with balancing strategy is proposed to suppress the unbalance of DC-link capacitor voltages. The simulation results presented in this paper highlight the improvements offered by the proposed control method based on the extended Kalman filter under various operating conditions.
The deviation from the ideal waveformcauses disturbances and failure of end-user load equipment. Power traveling a long distance from the generation plant to the end-user leads to deterioration of its quality, and the intensive utilization of power leads to serious issues in the grid resulting in power quality problems. To make the system effective and able to meet modern requirements, flexible AC transmission system (FACTS) devices should be installed into the grid. The interline power flow controller (IPFC) is the latest FACTS device, which compensates for both active and reactive power among multi-line systems. The converters used in the IPFC are crucial as they can be adjusted to regulate the power flow among the lines. This paper proposes a cascaded IPFC with hysteresis and proportional resonant voltage controllers. Some main drawbacks of controllers like steady-state errors and reference tracking of converters can be easily achieved by the PR controller, which makes the system efficient and can be used for a wide range of grid applications. Hysteresis and PR controllers are explained in detail in the following sections. A comparative analysis is carried out among control algorithms to choose the suitable controller which maintains stability in the system.
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In this study, the analysis, simulation and realization of direct current to alternating current multilevel inverter are discussed. Inverter operation with the high-frequency mode is evaluated and tested for the validation of the topology. This inverter type will be used in an induction heating system or other industrial applications need high-frequency, periodic and alternating signals. The control signals of electronic switches are implemented via an open-source board, Arduino, composed of an Atmega2560 microcontroller. Simulation with MATLAB/Simulink environments and experimental results are presented, comparatively, for a comparison.
PL
W artykule zaprezentowano symulację, analizę I eksperymentalną weryfikację przekształtnika. DC/AC. Ten typ przekształtnika może być zastosowany w nagrzewaniu elektrycznym lub innych zastosowaniach wymagających prądu wcz.
This paper presents a new concept for a power electronic converter – the extended T-type (eT) inverter, which is a combination of a three-phase inverter and a three-level direct current (dc)/dc converter. The novel converter shows better performance than a comparable system composed of two converters: a T-type inverter and a boost converter. At first, the three-level dc/dc converter is able to boost the input voltage but also affects the neutral point potential. The operation principles of the eT inverter are explained and a simulation study of the SiC-based 6 kVA system is presented in this paper. Presented results show a serious reduction of the DC-link capacitors and the input inductor. Furthermore, suitable SiC power semiconductor devices are selected and power losses are estimated using Saber software in reference to a comparative T-type inverter. According to the simulations, the 50 kHz/6 kVA inverter feed from the low voltage (250 V) shows <2.5% of power losses in the suggested SiC metal oxide–semiconductor field-effect transistors (MOSFETs) and Schottky diodes. Finally, a 6 kVA laboratory model was designed, built and tested. Conducted measurements show that despite low capacitance (2 × 30 μF/450 V), the neutral point potential is balanced, and the observed efficiency of the inverter is around 96%.
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Conventionally, control signals fed to the PWM inverters are produced by electronic hardware or microprocessor. The cost and complexity of hardware implementation are considerable and control algorithms differ for PWM for different levels and topologies is proposed. On-line computation in the microprocessor approach is laborious and time-consuming. These two approaches seem impractical when they are applied to PWM multilevel inverter control. In this paper, programmed matrix PWM based on two dimensional addressing modes for FPGA memories can solve the problems mentioned above and provides easy, fast and steady control. Experimental results are carried out to confirm the high performance of the proposed embedded PWM.
PL
W artykule zaproponowano programowalny macierzowy przekształtnik PWM bazujący na dwuwymiarowym adresowaniu pamięci FPGA. Otrzymano wbudowany moduł PWM znacznie prostszy od typowych rozwiazań.
The effect of space vector modulation algorithm on magnitude of current vector ripples was considered on the mathematical model of a three-level three-phase voltage inverter with symmetric active inductive load. Limitations on the use of such inverters as a power supply for precision drive of optical telescopes were specified.
This paper describes a new approach and methodology of quantitative assessment of the fault tolerance of electric power drive consisting of the multi-phase traction electric motor and multilevel electric inverter. It is suggested to consider such traction drive as a system with several degraded states. As a comprehensive parameter for evaluating of the fault tolerance, it is proposed to use the criterion of degree of the fault tolerance. For the approbation of the proposed method, the authors carried out research and obtained results of its practical application for evaluating the fault tolerance of the power train of an electrical helicopter.
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Artykuł przedstawia uśredniony model kompensatora udarów mocy, budowany na podstawie falownika czteropoziomowego typu Diode Clamped i zasobnika superkondensatorowego, z przeznaczeniem do zastosowania w systemach elektroenergetycznych jednostek morskich. Opracowany model jest dedykowany do zadań związanych z syntezą i weryfikacją nadrzędnych algorytmów sterowania oraz symulacji izolowanych systemów elektroenergetycznych.
EN
Paper presents continuous average model of power surge compensator, based on a four level diode clamped inverter. The model is suitable for synthesis of control algorithms, as well for simulation of ship’s power conditioning unit designed to an active power surge smoothing in isolated power plants.
This paper presents the modeling and simulation of a novel topology of quasi Z-Multilevel Inverter with stepped DC input. The proposed inverter incorporates a simple switching technique with reduced component count and is aimed at producing boosted multilevel output AC voltage. The inverter consists of two stages and the buck /boost operation is obtained by varying the shoot through period of the pulses obtained by maximum constant boost control with third harmonic injection. With all the advantages of the quasi Z-network, the proposed inverter eliminates the fly back diodes and capacitors present in a conventional Z-Multilevel Inverter. Further the stress on the devices is less which leads to reduction in component value and hence the cost. The novel stepped DC coupled Single Phase quasi Z-Multilevel Inverter is modeled and simulated in the MATLAB – SIMULINK environment and its performance is analyzed for varying input and switching conditions. The voltage and current waveforms across each stage of the inverter is analyzed and the results are presented for different levels of input.
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To improve the flexibility of the multilevel space vector pulse width modulation (SVPWM), various algorithms have been developed. A theoretical comparison is made for three 2-D SVPWM algorithms: they are g-h frame, α' - β' frame and multilevel SVPWM based on two-level (α* - β* frame). The aim is to provide a guideline for the selection of the most appropriate SVPWM technique for digital implementation. Among them, the α' - β' frame offers the best flexibility with the least calculation and is well suited for digital implementation. The α* - β* frame is the most intuitionistic but has the largest calculation. New general methods of the g-h frame and α' - β' frame for any level SVPWM are also provided, which needs only the angle θ and the modulation depth m to generate and arrange the final vector sequence. All three methods are implemented in a field programmable gate array (FPGA) with very high speed integrated circuit hardware description language (VHDL) and compared in terms of implementation complexity and logic resources required. Simulation results show the absolute advantages of α' - β' frame in briefness and resources use. Finally, an experimental test result is presented with a three-level neutral-point-clamped (NPC) inverter.
The paper presents a laboratory prototype of the three-phase transformer less voltage outages compensator with an energy storage based on high voltage supercapacitors. The system described is able to protect an isolated grid e.g. in industry against short voltage interruptions, dips and sags. An idea of a control method as well as a Digital controller has been presented, too.
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This paper proposes a novel power balancing control scheme for the cascaded H-bridge (CHB) DSTATCOM. The principle of the carrier phase-shifted pulse-width modulation (CPS-PWM) and the mathematical model of the CHB-DSTATCOM are presented. The power balancing mechanism and the stable control region are analyzed using the phasorial diagram representation. The current loop controller is designed by using root locus approach, and the dc-link voltage balancing controller is synthesized based on the devised power balancing mechanism. The simulation results obtained from the alternative transient program (ATP) are presented and evaluated. The validity and effectiveness of the control scheme is confirmed by the simulation and experimental results.
PL
Zapropnowano nową metodę równoważenia mocy w kaskadowym H-mostkowym SSTATCOM. Zaprezentowano zasadę modulacji przesunięcia fazowego i szerokości impulsu CPS-PWM i model matematyczny CHB-DSTATCOM. Równoważenie mocy i analiza stabilnego sterowania zostały przeprowadzone przy użyciu diagramu fazowego. Kontroler pętli prądowej został zaprojektowany przy użyciu obwiedni pierwiastkowej a kontroler napięcia dc-link jest syntetyzowany na podstawie balansu mocy. Przedstawiono symulowane rezultaty. Symulacje i eksperymenty potwierdziły skuteczność metody.
The fundamental problem of using the shaft generators of high power in the shipping systems is bound up with the stability of frequency. Electronic systems used nowadays are based on the thyristor inverters which entails vices of such solutions. The article presents the conception of the use of multi-level inverters built on the basis of fully controllable valves (transistors IGBT).This solution eliminates the defects of thyristor inverters.
PL
Zasadniczy problem stosowania w systemach okrętowych prądnic wałowych dużej mocy związany jest ze stabilizacją częstotliwości. Stosowane obecnie układy energoelektroniczne opierają się na wykorzystaniu falowników tyrystorowych, które implikują wady takich rozwiązań. W artykule przedstawiono koncepcję wykorzystania falowników wielopoziomowych, zbudowanych w oparciu o zawory w pełni sterowalne (tranzystory IGBT), które pozbawione są wad falowników tyrystorowych.
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A novel approach for implementation of the PWM gating and IGBT protection scheme is proposed for the grid-connected cascaded Hbridge multilevel inverter applications. The controller architecture based on the master/slave configuration is presented, with the main focus on the implementation issues of the bottom FPGA controller and IGBT drivers. The gating strategies and protection scheme are presented by introducing the hardware circuitry and the VHDL codes. Experimental results based on three H-bridge modules are provided for verification.
PL
Zaproponowano nową możliwość wykorzystania bramkowania PWM i protekcji IGBT w sieciowo połączonej kaskadzie wielopoziomowych przekształtników. Architektura kontrolera bazowała na konfiguracji master/slave. Strategia bramkowania i schemat zabezpieczeń zostały sprawdzone sprzętowo. Wyniki eksperymentu z trzema mostkowymi modułami typu H potwierdziły założenia. (Zastosowanie bramkowania PWM i zabezpieczenia IGBT w kratowo połączonym wielopoziomowym przekształtniku.
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