Residue scaling is needed in pipelined FFT radix-4 processors based on the Modified Quadratic Residue Number System (MQRNS) at the output of each butterfly. Such processor uses serial connection of radix-4 butterflies. Each butterfly comprises n subunits, one for each modulus of the RNS base and generates four complex residue numbers. In order to prevent the arithmetic overflow in the succesive stage, every number has to be scaled, i.e. divided by a certain constant. The dynamic range of the processed signal increases due to the summation within the butterfly and the transformation of coefficients of the FFT algorithm to integers. The direct approach would require eight residue scalers that would be highly ineffective regarding that such a set of scalers had to be placed after each butterfly. We show and analyze a structure which uses parallel-to-serial transformation of groups of numbers so that only two scalers are needed.
Residue scaling is needed in pipelined FFT radix-4 processors based on the Modified Quadratic Residue Number System (MQRNS) at the output of each butterfly. Such processor uses serial connection of radix-4 butterflies. Each butterfly comprises n subunits, one for each modulus of the RNS base and generates four complex residue numbers. In order to prevent arithmetic overflow intermediate results after each butterfly have to be scaled, i.e. divided by a certain constant. The number range of the processed signal increases due to transformation of coefficients of the FFT algorithm to integers and summation and multiplication within the butterfly. The direct approach would require eight residue scalers that would be highly ineffective regarding that such a set of scalers had to be placed after each butterfly. We show and analyze a structure which uses parallel-to-serial transformation of groups of numbers so that only two residue scalers are needed.
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The paper presents the design and implementation of the radix-4 DFT butterfly with the use of the complex residue number system (CRNS) the modified quadratic residue number system(MQRNS). The MQRNS in addition to the decompositional property of the residue number system allows for the realization of the complex multiplication with three real multiplications. In the Xilinx FPGA Virtex 6 for the 5-bit CRNS base the implementation of multiplications, additions and modulo operations can be based on 6-bit ROM's realized with (26x 1) LUT's. The radix-4 DFT butterfly formula is transformed so that the DFT transforms values are 4-operand sums of the input numbers with the succesive complex multiplications. In the first stage the 4-operand modulo m additions are performed, then the required CRNS/MQRNS conversions are done. In the following stage the MQRNS multiplications are performed with the succeeding reverse MQRNS/CRNS conversion. Such configuration allows to attain high pipelining frequencies.
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