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  1. 9 Journal of Telecommunications and Information Technology
  2. 3 Elektronika : konstrukcje, technologie, zastosowania
  3. 2 Opto-Electronics Review
  4. 2 Przegląd Telekomunikacyjny + Wiadomości Telekomunikacyjne
  5. 1 Combustion Engines
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  1. 6 Jakubowski A.
  2. 6 Łukasiak L.
  3. 2 Druzhinin A.
  4. 2 Pióro Z.
  5. 1 Abdo N.
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  1. 1 2019
  2. 1 2015
  3. 1 2014
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  5. 1 2009
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1
Content available The CFD analysis of influence the start of fuel injection (SOI) on combustion parameters and exhaust gas composition of the marine 4-stroke engine
Kowalski Jerzy
Combustion Engines
|
2019
|
R. 58, nr 2
40--45
EN
The paper presents a theoretical analysis of the impact of injection timing on the parameters of the combustion process and the composition of exhaust gas from a 4-stroke engine designed to shipbuilding. The analysis was carried out based on a three-dimensional multi-zone model of the combustion process. This model has been prepared on the basis of properties of the research facility. The input data to the model were obtained through laboratory tests. Results of calculations showed that the change of the start of injection angle (SOI) from the value of 14 degrees before TDC to 22 degrees before TDC results in changes in the combustion rate and thus an increase in the temperature of the combustion process as well as the increase of nitric oxides fraction in the exhaust gas. Simultaneously the maximum combustion pressure increases also.
2
Content available Silicon-on-Insulator technology for imaging and application to a switching photodetector
Abdo N., Sallin D., Koukab A., Estribeau M., Magnan P., Kayal M.
International Journal of Microelectronics and Computer Science
|
2015
|
Vol. 6, nr 4
136--141
EN
This paper analyzes some advantages of Silicon-on-Insulator (SOI) based photodetectors for low light imaging. It shows that SOI based sensors not only solve the bulk carriers problem, it can also act as a very selective spectral filter by acting as a resonant cavity, which is useful in application with a very narrow spectrum of interest, such as bioluminescence imaging. The SOI implementation of a switching photodetector based with an hybrid MOS-PN structure is presented and its advantages in terms of dark current minimization and SNR improvement highlighted.
3
Content available CMOS Readout Circuit Integrated with Ionizing Radiation Detectors
Szymański A., Obrębski D., Marczewski J., Tomaszewski D., Grodner M., Pieczyński J.
International Journal of Electronics and Telecommunications
|
2014
|
Vol. 60, No. 1
117-124
EN
This paper describes the work performed in ITE on integration in one CMOS chip the ionizing radiation detectors with dedicated readout electronics. At the beginning, some realizations of silicon detectors of ionizing radiation are presented together with most important issues related to these devices. Next, two developed test structures for readout electronics are discussed in detail together with main features of non-typical silicon proces deployed.
4
Content available remote Can Vivaldi Help in IP Geolocation?
Komosny D., Kathiravelu G., Simek M.
Przegląd Elektrotechniczny
|
2013
|
R. 89, nr 5
100-106
EN
The paper deals with IP geolocation based on communication latency measurement. The aim of IP geolocation is to estimate the geographical location of an IP-enabled node. Latency-based IP geolocation methods measure latency from a set of landmarks with the known geographical position to a target with an unknown position. When the latency values are known, the target position is estimated using multilateration. A disadvantage is that for each target’s position estimation, a new latency measurement is required. In order to avoid this, it has been proposed to employ a latency prediction method, such as Vivaldi, to predict the latency between a target and a landmark and, thus, reduce the number of latency measurements. In this paper, we investigate this proposal in terms of location accuracy and efficiency. The conclusion of the paper gives an indicative answer about the credibility of Vivaldi for its use in IP geolocation.
PL
W artykule przedstawiono metodę geolokalizacji IP na podstawie pomiarów opóznień w komunikacji. Działanie algorytmu opiera się na analizie opóznień przesyłu sygnałów z kilku punktów orientacyjnych o znanym położeniu, do określonego celu. Na tej podstawie, z wykorzystaniem multilateracji, określana jest szukana pozycja. Zastosowano także metodę predykcji opóznień przesyłu sygnału Vivaldi, w celu ograniczenia ilości każdorazowych estymacji. Algorytm poddano analizie pod względem precyzji i skutecznosci lokalizacji.
5
Content available Wymagania dla środków ochrony indywidualnej (SOI) w górnictwie podziemnym
Lipowczan A.
Zeszyty Naukowe Wyższej Szkoły Zarządzania Ochroną Pracy w Katowicach
|
2009
|
Nr 1(5)
5-13
PL
W referacie przedstawiono czynniki determinujące znaczenie stosowania środków ochrony indywidualnej w górnictwie ze szczególnym uwzględnieniem górnictwa podziemnego. Przytoczono klasyfikację SOI. Na tej podstawie omówiono uwarunkowania certy-fikacyjne wynikające z wymagań Unii Europejskiej oraz przedstawiono trzy istotne czynniki charakterystyczne dla górnictwa, które powinny być uwzględniane w procesie wyboru SOI.
EN
The paper presents the importance of personal individual protector (PIP) factors in mining industry with the special stress on coal underground mining. The classification of PIP was quoted in the paper. On these bases the certification conditions which arise from EU directives are also presented. In author opinion there are three main factors which are representative for mining industry and must be taken into account during the selection processes i.e.: explosives conditions in work environment, anthropometric factors of protected population and PIP universality.
6
Tranzystor - 60 lat minęło i co dalej?
Jakubowski A., Łukasiak L.
Przegląd Telekomunikacyjny + Wiadomości Telekomunikacyjne
|
2008
|
R. 81, nr 5
666-671
PL
Przedstawiono historię elektroniki półprzewodnikowej ze szczególnym uwzględnieniem tranzystora MOS, trudności związane z dalszą miniaturyzacją, możliwe kierunki rozwoju oraz wybrane ograniczenia fundamentalne.
EN
The papers briefly presents the history of semiconductor electronics with emphasis on MOS transistor, difficulties associated with further miniaturization, possibile directions of development and selected fundamental limitations.
7
Content available remote CMOS evolution. Development limits
Jakubowski A., Łukasiak L.
Materials Science Poland
|
2008
|
Vol. 26, No. 1
5--20
EN
Evolution of complementary metal oxide semiconductor (CMOS) technology is presented from the very first MOS transistors to state-of-the-art structures. Difficulties of scaling are discussed together with ways to overcome them. New options for silicon microelectronics (SOI technology and strain engineering) are described. Finally, fundamental limitations to progress in semiconductor devices are considered.
8
Content available Special size effects in advanced single-gate and multiple-gate SOI transistors
Ohata A., Ritzenthaler R., Faynot O., Cristoloveanu S.
Journal of Telecommunications and Information Technology
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2007
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nr 2
14-24
EN
State-of-the-art SOI transistors require a very small body. This paper examines the effects of body thinning and thin-gate oxide in SOI MOSFETs on their electrical characteristics. In particular, the influence of film thickness on the interface coupling and carrier mobility is discussed. Due to coupling, the separation between the front and back channels is difficult in ultra-thin SOI MOSFETs. The implementation of the front-gate split C-V method and its limitations for determining the front- and back-channel mobility are described. The mobility in the front channel is smaller than that in the back channel due to additional Coulomb scattering. We also discuss the 3D coupling effects that occur in FinFETs with triple-gate and omega-gate configurations. In low-doped or tall fins the corner effect is suppressed. Narrow devices are virtually immune to substrate effects due to a strong lateral coupling between the two lateral sides of the gate. Short-channel effects are drastically reduced when the lateral coupling screens the drain influence.
9
Content available SOI nanodevices and materials for CMOS ULSI
Palestra F.
Journal of Telecommunications and Information Technology
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2007
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nr 2
3-13
EN
A review of recently explored new effects in SOI nanodevices and materials is given. Recent advances in the understanding of the sensitivity of electron and hole transport to the tensile or compressive uniaxial and biaxial strains in thin film SOI are presented. The performance and physical mechanisms are also addressed in multi-gate Si, SiGe and Ge MOSFETs. The impact of gate misalignment or underlap, as well as the use of the back gate for charge storage in double-gate nanodevices and of capacitorless DRAMare also outlined.
10
Content available Charge-pumping characterization of SOI devices fabricated by means of wafer bonding over pre-patterned cavities
Głuszko G., Łukasiak L., Kilchytska V., Chung T. M., Olbrechts B., Flandrie D., Raskin J. P.
Journal of Telecommunications and Information Technology
|
2007
|
nr 3
61-66
EN
The quality of the silicon-buried oxide bonded interface of SOI devices created by thin Si film transfer and bonding over pre-patterned cavities, aiming at fabrication of DG and SON MOSFETs, is studied by means of chargepumping (CP) measurements. It is demonstrated that thanks to the chemical activation step, the quality of the bonded interface is remarkably good. Good agreement between values of front-interface threshold voltage determined from CP and I-V measurements is obtained.
11
Content available remote Effect of heat treatment at enhanced pressure on electrical and structural properties of silicon surface layer co-implanted with hydrogen and helium ions
Jung W., Misiuk A., Ratajczak J., Barcz A.
Opto-Electronics Review
|
2005
|
Vol. 13, No. 1
31--34
EN
Electrical and structural properties of silicon surface layer created by high pressure annealing of hydrogen and helium co-implanted silicon were investigated by current and capacitance measurements of Schottky barrier junction Hg-Si (mercury probe), cross-sectional transmission electron microscopy and SIMS analysis. The most striking result is finding that hydrogen and helium co-implantation leads to shallow donors generation and changes in the type of conductivity even for low concentration of oxygen in silicon. High pressure thermal anneals result in additional donor formation in the implanted silicon surface layer.
12
Content available Low frequency noise in advanced Si bulk and SOI MOSFETs
Jomaah J., Balestra F., Ghibaudo G.
Journal of Telecommunications and Information Technology
|
2005
|
nr 1
24-33
EN
A review of recent results concerning the low frequency noise in modern CMOS devices is given. The approaches such as the carrier number and the Hooge mobility fluctuations used for the analysis of the noise sources are presented and illustrated through experimental data obtained on advanced CMOS SOI and Si bulk generations. Furthermore, the impact on the electrical noise of the shrinking of CMOS devices in the deep submicron range is also shown. The main physical characteristics of random telegraph signals (RTS) observed in small area MOS transistors are reviewed. Experimental results obtained on 0.35-0.12 žm CMOS technologies are used to predict the trends for the noise in future CMOS technologies, e.g., 0.1 žm and beyond. For SOI MOSFETS, the main types of layout will be considered, that is floating body, DTMOS, and body-contact. Particular attention will be paid to the floating body effect that induces a kink-related excess noise, which superimposes a Lorentzian spectrum on the flicker noise.
13
Półprzewodniki a techniki i technologie informacyjne
Jakubowski A., Łukasiak L., Pióro Z.
Przegląd Telekomunikacyjny + Wiadomości Telekomunikacyjne
|
2004
|
nr 8-9
337-345
PL
Omówiono wpływ mikroelektroniki na rozwój technik technologii informacyjnych, krótko przedstawiono najważniejsze etapy historii mikroelektroniki, przedyskutowano wybrane problemy skalowania tranzystora MOS oraz sposoby ich rozwiązywania, rozważono ograniczenia dla działania prawa Moore'a w przyszłości.
EN
The influence of microelectronics on the development of information technology was described, the most important moments of microelectronics history were briefly presented, selected critical issues of MOSFET scaling were discussed, as well as possible solutions, future limitations to the validity of Moore's law were considered.
14
Content available Silicon microelectronics: where we have come from and where we are heading
Łukasiak L., Jakubowski A., Pióro Z.
Journal of Telecommunications and Information Technology
|
2004
|
nr 1
7-14
EN
The paper briefly presents the history of microelectronics and the limitations of its further progress, as well as possible solutions. The discussion includes the consequences of the reduction of gate-stack capacitance and difficulties associated with supply-voltage scaling, minimization of parasitic resistance, increased channel doping and small size. Novel device architectures (e.g. SON, double-gate transistor) and the advantages of silicon-germanium are considered, too.
15
Content available Recent developments in vertical MOSFETs and SiGe HBTs
Hall S., Buiu O., Ashburn P., de Groot K.
Journal of Telecommunications and Information Technology
|
2004
|
nr 1
26-35
EN
There is a well recognised need to introduce new materials and device architectures to Si technology to achieve the objectives set by the international roadmap. This paper summarises our work in two areas: vertical MOSFETs, which can allow increased current drive per unit area of Si chip and SiGe HBT's in silicon-on-insulator technology, which bring together and promise to extend the very high frequency performance of SiGe HBT's with SOI-CMOS.
16
Nowe aspekty zjawisk podłożowych w tranzystorach SOI-MOS
Janczyk G.
Elektronika : konstrukcje, technologie, zastosowania
|
2004
|
Vol. 45, nr 10
25-26
PL
Stosowane obecnie modele symulacyjne elementów MOS SOI nie uwzględniają rzeczywistych zjawisk podłożowych. Zastępują je empirycznymi współczynnikami kalibrującymi. Opracowano szkielet nowego, sekcyjnego modelu symulacyjnego elementów MOS SOI.
EN
Popular models of MOS SOI devices neglect real phenomena present within the device substrate. There are many of fitting only, empiric parameters emulating real body phenomena. New compact MOS SOI model was developed and introduced as an alternative to the existing models.
17
Mikroelektronika : materiały i przyrządy
Jakubowski A., Łukasiak L., Szmidt J.
Elektronika : konstrukcje, technologie, zastosowania
|
2002
|
Vol. 43, nr 7/8
5-8
PL
Mikroelektronika jest fundamentem przemysłu technik informacyjnych. Wartość sprzedaży systemów elektronicznych, które bez mikroelektroniki istnieć by nie mogły osiągnęła obecnie 1000 mld USD stawiając ten przemysł na pierwszej pozycji nie tylko ze względów cywilizacyjnych i strategicznych, ale także rynkowych. Udział półprzewodników w wartości sprzedaży systemów elektronicznych systematycznie wzrasta i wynosi obecnie ok. 25%. W artykule przedstawiono stan obecny i tendencje rozwojowe mikroelektroniki. Przedyskutowano także bariery i ograniczenia dotychczasowego rozwoju opartego na klasycznych przyrządach, głównie typu MOS. Przedstawiono również inne niż krzem materiały podłożowe, które mogą znaleźć zastosowanie w mikroelektronice.
EN
Microelectronics is the foundation of the information-technology industry. Sales of electronics systems, which would not be feasible without microelectronics, reach currently 1000 billion U.S. dollars. This alone puts this industry in the leading position because economic of reasons, not to mention civilization and strategic ones. The contribution of semiconductors in the sales of electronics systems is steadily increasing and currently reaches the level of 25 per cent. The paper presents the current state and development trends of microelectronics. Barriers and limitations of microelectronics development based on classical devices (mostly of the MOS type) are discussed, too. Moreover, new, promising substrate materials, other than silicon, are presented.
18
Content available On possibility to extend the operation temperature range of SOI sensors with polysilicon piezoresistors
Druzhinin A., Lavitska E., Maryamova I., Kogut I., Khoverko Y.
Journal of Telecommunications and Information Technology
|
2001
|
nr 1
40-45
EN
The aim of this work was to study the possibilities of developing mechanical sensors with poly-Si piezoresistors on insulating substrate for operation in different temperature ranges (low, elevated and high temperatures). Laser recrystallization is used as a technological tool to adjust the electrical and piezoresistive parameters of the polysilicon layer. For this purpose a set of studies including numerical simulation and experimental work has been carried out. The main three directions of the studies are considered: problems of thermal stabilization of the pressure sensor performance at elevated and high temperatures; problem of sensor operation at cryogenic temperatures; development of a multifunctional pressure-temperature sensor.
19
Content available High-temperature instability processes in SOI structures and MOSFETs
Nazarov A.N., Kilchytska V.I., Vovk Ja.N., Colinge J.P.
Journal of Telecommunications and Information Technology
|
2001
|
nr 1
18-26
EN
The paper reviews the problems related to BOX high-temperature instability in SOI structures and MOSFETs. The methods of bias-temperature research applied to SOI structures and SOI MOSFETs are analysed and the results of combined electrical studies of ZMR, and SIMOX SOI structures are presented. The studies are focused mainly on electrical discharging processes in the BOX at high temperature and its link with new instability phenomena such as high-temperature kink effects in SOI MOSFETs.
20
Content available Grain boundary effect on the anisotropy piezoresistance of laser-recrystallized polysilicon layers in SOI-structures
Pankov Y., Druzhinin A.
Journal of Telecommunications and Information Technology
|
2001
|
nr 1
46-48
EN
A physical model of grain boundary influence on the piezoresistive effect of p-type conductivity of polysilicon layers in SOI-structures is developed. Software calculating piezoresistive properties of boron-doped p-type polysilicon layers has been developed. These properties may be calculated over wide concentration and temperature ranges with anisotropy taken into account and with the average grain size as a parameter. The potential barrier regions around the grain boundaries influence the deformation changes of anisotropy resistance in the fine-grained non-recrystallized SOI-structures doped with boron up to 3ź10(19)cm(-3) only.
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