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1
Content available Secure Data Aggregation in Wireless Sensor Network using Chinese Remainder Theorem
Thomas Sanu, Mathew Thomaskutty
International Journal of Electronics and Telecommunications
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2022
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Vol. 68, No. 2
329--336
EN
A new method of lossless Secure Data Aggregation for Wireless Sensor Network is presented. Secure Data Aggregation is achieved using the popular Chinese Remainder theorem. Here, an ‘Augmented Chinese Remainder System’ is introduced that incorporates additional features to enforce a higher level of security to the aggregated data. The scheme provides inbuilt signature verification and eliminates the need for separate data validation algorithms. The method achieves data integrity and authentication simultaneously in addition to lossless data aggregation for the data forwarded from the Cluster Head to the Base Station. The aggregate contains the entire individual data from sensors in the encrypted form and the receiver deaggregates it to get the original data in full without any loss. The Augmented Chinese Remainder System can be extended to secure Multi-level Data Aggregation for WSN.
2
Content available Efficient implementation of Chinese remainder theorem in minimally redundant residue number system
Selianinau Mikhail
Computer Science
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2020
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T. 21 (2)
237--252
EN
The Chinese remainder theorem is widely used in many modern computer applications. This paper presents an efficient approach to the calculation of the rank of a number, a principal positional characteristic that is used in the residue number system. The proposed method does not use large modulo addition operations as compared to a straightforward implementation of the Chinese remainder theorem algorithm. The rank of a number is equal to the sum of an inexact rank and a two-valued correction factor that only takes on values of 0 or 1. We propose a minimally redundant residue number system that provides a low computational complexity of the rank calculation. The effectiveness of the novel method is analyzed regarding a conventional non-redundant residue number system. Owing to the extension of the residue code, the complexity of the rank calculation goes down from O(k2) to O(k) by adding the extra residue modulo 2 (where k equals the number of non-redundant residues).
3
Content available A Method to Support Diagnostics of Dynamic Faults in Networks of Interconnections
Garbolino T.
International Journal of Electronics and Telecommunications
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2018
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Vol. 64, No. 3
407--420
EN
The article is devoted to the method facilitating the diagnostics of dynamic faults in networks of interconnection in systems-on-chips. It shows how to reconstruct the erroneous test response sequence coming from the faulty connection based on the set of signatures obtained as a result of multiple compaction of this sequence in the MISR register with programmable feedback. The Chinese reminder theorem is used for this purpose. The article analyzes in detail the various hardware realizations of the discussed method. The testing time associated with each proposed solution was also estimated. Presented method can be used with any type of test sequence and test pattern generator. It is also easily scalable to any number of nets in the network of interconnections. Moreover, it supports finding a trade-off between area overhead and testing time.
4
Content available remote Remarks on multivariate extensions of polynomial based secret sharing schemes
Derbisz J.
Studia Bezpieczeństwa Narodowego
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2014
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R. 4, Nr 6
285--297
EN
We introduce methods that use Gröbner bases for secure secret sharing schemes. The description is based on polynomials in the ring R = K[X1,...,Xl] where identities of the participants and shares of the secret are or are related to ideals in R. Main theoretical results are related to algorithmical reconstruction of a multivariate polynomial from such shares with respect to given access structure, as a generalisation of classical threshold schemes. We apply constructive Chinese remainder theorem in R of Becker and Weispfenning. Introduced ideas find their detailed exposition in our related works.
PL
Wprowadzamy metody wykorzystujące bazy Gröbnera do schematów podziału sekretu. Opis bazuje na wielomianach z pierścienia R = K[X1,...,Xl], gdzie tożsamości użytkowników oraz ich udziały są lub są związane z ideałami w R. Główne teoretyczne rezultaty dotyczą algorytmicznej rekonstrukcji wielomianu wielu zmiennych z takich udziałów zgodnie z zadaną (dowolną) strukturą dostępu, co stanowi uogólnienie klasycznych schematów progowych. W pracy wykorzystujemy konstruktywną wersję Chińskiego twierdzenia o resztach w pierścieniu R pochodzącą od Beckera i Weispfenninga. Wprowadzone idee znajdują swój szczegółowy opis w naszych związanych z tym tematem pracach.
5
FPGA implementation of reverse residue conversion based on the new Chinese Remainder Theorem II- Part II: experimental results
Ulman Z., Czyżak M., Smyk R.
Poznan University of Technology Academic Journals. Electrical Engineering
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2012
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No. 71
139--147
EN
This work describes a hardware realization of the converter of numbers from the Residue Number System (RNS) to the binary system. The converter is based on the new form of the Chinese Remainder Theorem (CRT) termed the New CRT II. The theoretical aspects of conversion by this method have been described in Part I. The implementation of the converter has been carried out in the Xilinx FPGA environment. The general architecture of the system is shown, also the realizations of the selected blocks of the converter are described. The hardware amount and attainable pipelining rate are given. The converter has been realized for the RNS base composed of eight 5-bit moduli that gives the dynamic range of about 37 bits.
6
FPGA implementation of reverse residue conversion based on the new Chinese Remainder Theorem II- Part I
Ulman Z., Czyżak M., Smyk R.
Poznan University of Technology Academic Journals. Electrical Engineering
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2012
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No. 71
133--138
EN
This work describes a derivation and an implementation of the algorithm of conversion from the Residue Number System (RNS) to the binary system based on the new form of the Chinese Remainder Theorem (CRT) termed the New CRT II. The new form of the CRT does not require the modulo M operation, where M is the residue number system range, but a certain number of multipliers is needed. Because in the FPGA environments the multipliers or the special DSP blocks are available, so they can be used in the converter realization. The main aim of the work is to examine experimentally the needed hardware amount and the influence of the multipliers on the maximum pipelining frequency. In Part I the derivation of the conversion algorithm is described. In Part II the hardware implementation of the converter in the FPGA technology is shown.
7
FPGA realization of the high-speed residue-to-binary converter based on the Chinese Remainder Theorem
Czyżak M., Smyk R.
Poznan University of Technology Academic Journals. Electrical Engineering
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2010
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No. 63
197-203
EN
An architecture and the FPGA realization of a high-speed residue-to-binary converter for five-bit moduli are presented. The converter algorithm is based on the Chinese Remainder Theorem. The orthogonal projections are obtained by the look-up. The modulo M summation of projections is carried out by using the tree of carry-save adders with the succesive reduction of the sum to 2M range. Succesively the segmentation of the output vectors of the carry-save adder and final modulo M reduction are performed.
8
Content available remote On application of polynominal algebra for identification of dynamic faults in interconnects
Kopeć M., Garbolino T., Gucwa K., Hławiczka A.
Electronics and Telecommunications Quarterly
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2008
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Vol. 54, No 1
29-41
EN
The paper presents a new method that is an effective instrument for investigating sources of dynamic faults in interconnects (i.e. crosstalk, delay faults, etc.). It is an extension of the previous work of the authors published in the Proceedings of the European Test Symposium 2006, where fault identification was limited to static faults only. In the proposed approach an erroneous bit sequence coming from the faulty net is reconstructed on the basis of a set of signatures. This facilitates precise identification of dynamic faults. Discussed method is applicable to interconnects between ICs mounted on the PCBs as well as interconnect networks connecting IP cores in SoCs. Moreover, it is easily scalable to any number of nets in the interconnect network and can be used with any type of test sequence and test pattern generator. There are several variant s of hardware implementation of the method. This supports finding a trade-off between area overhead and testing time.
9
Content available remote Chińskie korzenie matematyki rekreacyjnej. Cz. II
Biernacki W.
Wiadomości Naftowe i Gazownicze
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2007
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R. 10, Nr 2 (106)
21-25
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