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Review and comparison of methods for limiting leakage currents in single-phase transformerless PV inverter topologies

Kołodziejski Wojciech, Jasielski Jacek, Kuta Stanisław W., Szerszeń Grzegorz, Machowski Witold

Science, Technology and Innovation

2022

Vol. 16, no. 3-4

1--19

Transformerless inverters are widely used in different photovoltaic nonisolated ac module applications, mainly in grid-tied photovoltaic (PV) generation systems, due to the benefits of achieving high efficiency over a wide load range, and low cost. Various transformerless inverter topologies have been proposed to meet the safety requirement of low ground leakage currents, such as specified in the VDE-4105 standard and low-output ac-current distortion. Topology modifications of transformerless full bridge inverters are designed to balance and maintain a constant common mode output voltage, thereby eliminating or reducing leakage currents. This article reviews and compares the different methods for limiting leakage currents in known topologies of the full-bridge transformerless inverters, such as: H4, H5, H6, HERIC, and their improvements. The main topologies and strategies used to reduce the leakage current in transformerless schemes are summarized, highlighting advantages and disadvantages and establishing points of comparison with similar topologies. To compare the properties of different medium to high power inverters, PV inverter topologies were implemented using IGBTs and tested with the same components, same simulation parameters in PSPICE to evaluate their performance in terms of energy efficiency and leakage current characteristics. The detailed power stage operating principles, extended PWM modulator, and integrated universal gate driver with galvanic isolation in the transmission path of control signal for all IGBTs of the inverter, as well isolated and floating bias power supply for gate drivers are described.

Linearized 9-Bit Hybrid LBDD PWM Modulator for Digital Class-BD Amplifier

Kołodziejski Wojciech, Kuta Stanisław

International Journal of Electronics and Telecommunications

2021

Vol. 67, No. 1

49--57

The paper presents an original architecture and implementation of 9-bit Linearized Pulse Width Modulator (LPWM) for Class-BD amplifier, based on the hybrid method using STM32 microcontroller and Programmable Tapped Delay Line (PTDL). The analog input signals are converted into 12-bit PCM signals, then are directly transformed into 32-bit LBDD DPWM data of the pulse-edge locations within n-th period of the switching frequency, next requantized to the 9-bit digital outputs, and finally converted into the two physical trains of 1-bit PWM signals, to control the output stage of the Class-BD audio amplifier. The hybrid 9-bit quantizer converts 6 MSB bits using counter method, based on the peripherals of STM32 microcontroller, while the remaining 3 LSB bits - using a method based on the PTDL. In the paper extensive verification of algorithm and circuit operation as well as simulation in MATLAB and experimental results of the proposed 9-bit hybrid LBDD DPWM circuit have been performed. It allows to attain SNR of 80 dB and THD about 0,3% within the audio baseband.