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Rapid prototyping of recursive hardware: Karatsuba-Ofman's multiplication algorithm

Nedjah N., Macedo Mourelle L. de

Journal of Applied Computer Science

2004

Vol. 12, nr 1

43-59

It is a fairly hard task TO design hardware that implements recursive computations using a repetitive style, which is supported in mast hardware description languages suck as VHDL and Verilog. In this paper we show how one can very elegant and rapidly yield hardware models that implement recursive computations. The hardware model is expressed in the most popular hardware description language VHDL As a case study, we implement the Karatsuba-Ofman's divide-and-conquer multiplication algorithm. The generated hardware is efficient in terms of response time and compact in terms of hardware area.