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EN
In this paper, analytical expressions for the distribution of the envelope and phase of linearly modulated signals such as BPSK, M-PSK, and M-QAM in AWGN are presented. We perform numerical simulations for different orders of signal constellations. The results show that the proposed theoretical models are in excellent agreement with the estimated distributions from various numerical experiments.
EN
High Performance Computing (HPC) architectures are being developed continually with an aim of achieving exascale capability by 2020. Processors that are being developed and used as nodes in HPC systems are Chip Multiprocessors (CMPs) with a number of cores. In this paper, we continue our effort towards a better processor allocation process. The Processor Allocator (PA) and Job Scheduler (JS) proposed and implemented in our previous works are explored in the context of its best location on the chip. We propose a system, where all locations on a chip can be analyzed, considering energy used by Network-on-Chip (NoC), PA and JS, and processing elements. We present energy models for the researched CMP components, mathematical model of the system, and experimentation system. Based on experimental results, proper placement of PA and JS on a chip can provide up to 45% NoC energy savings.
EN
The medical imaging field has grown significantly in recent years and demands high accuracy since it deals with human life. The idea is to reduce human error as much as possible by assisting physicians and radiologists with some automatic techniques. The use of artificial intelligent techniques has shown great potential in this field. Hence, in this paper the neuro fuzzy classifier is applied for the automated characterization of atheromatous plaque to identify the fibrotic, lipidic and calcified tissues in Intravascular Ultrasound images (IVUS) which is designed using sixteen inputs, corresponds to sixteen pixels of instantaneous scanning matrix, one output that tells whether the pixel under consideration is Fibrotic, Lipidic, Calcified or Normal pixel. The classification performance was evaluated in terms of sensitivity, specificity and accuracy and the results confirmed that the proposed system has potential in detecting the respective plaque with the average accuracy of 98.9%.
EN
This paper is devoted to the total tardiness minimization scheduling problem, where the efficiency of a processor increases due to its learning. Such problems model real-life settings that occur in the presence of a human learning (industry, manufacturing, management) and in some computer systems. However, the increasing growth of significant achievements in the field of artificial intelligence and machine learning is a premise that the human-like learning will be present in mechanized industrial processes that are controlled or performed by machines as well as in the greater number of multi-agent computer systems. Therefore, the optimization algorithms dedicated in this paper for scheduling problems with learning are not only the answer for present day scheduling problems (where human plays important role), but they are also a step forward to the improvement of self-learning and adapting systems that undeniably will occur in a new future. To solve the analysed problem, we propose parallel computation approaches that are based on NEH, tabu search and simulated annealing algorithms. The numerical analysis confirm high accuracy of these methods and show that the presented approaches significantly decrease running times of simulated annealing and tabu search and also reduce the running times of NEH.
5
Content available remote Energy characteristic of a processor allocator and a network-on-chip
EN
Energy consumption in a Chip MultiProcessor (CMP) is one of the most important costs. It is related to design aspects such as thermal and power constrains. Besides efficient on-chip processing elements, a well-designed Processor Allocator (PA) and a Network-on-Chip (NoC) are also important factors in the energy budget of novel CMPs. In this paper, the authors propose an energy model for NoCs with 2D-mesh and 2D-torus topologies. All important NoC architectures are described and discussed. Energy estimation is presented for PAs. The estimation is based on synthesis results for PAs targeting FPGA. The PAs are driven by allocation algorithms that are studied as well. The proposed energy model is employed in a simulation environment, where exhaustive experiments are performed. Simulation results show that a PA with an IFF allocation algorithm for mesh systems and a torus-based NoC with express-virtual-channel flow control are very energy efficient. Combination of these two solutions is a clear choice for modern CMPs.
EN
One of possible situations for cooperative flights could be a scenario when the decision on a new path is taken by a certain fleet member, who is called the leader. The update on the new path is transmitted to the fleet members via communication that can be noisy. An optical sensor can be used as a back-up for re-estimating the path parameters based on visual information. For a certain topology, the problem can be solved by continuous tracking of the leader of the fleet in the video sequence and re-adjusting parameters of the flight, accordingly. To solve such a problem a real time system has been developed for recognizing and tracking 3D objects. Any change in the 3D position of the leading object is determined by the on-board system and adjustments of the speed, pitch, yaw and roll angles are made to sustain the topology. Given a 2D image acquired by an on-board camera, the system has to perform the background subtraction, recognize the object, track it and evaluate the relative rotation, scale and translation of the object. In this paper, a comparative study of different algorithms is carried out based on time and accuracy constraints. The solution for 3D pose estimation is provided based on the system of Zernike invariant moments. The candidate techniques solving the complete set of procedures have been implemented on Texas Instrument TMS320DM642 EVM board. It is shown that 14 frames per second can be processed; that supports the real time implementation of the tracking system with the reasonable accuracy.
EN
Most algorithms for polygon triangulation do not consider the quality of generated triangles. We present two approaches for modifying the ear-cutting triangulation algorithm so that the resulting mesh contains higher proportion of quality triangles. The first approach is based on searching for the best triangle by scanning the boundary. The second approach uses "stabbing diagonals" to partition the polygon onto components which can then be separately triangulated to increase the number of quality triangles.
EN
Companding, as a variant of audio level compression, can help reduce the dynamic range of an audio signal. In analog (digital) systems, this can increase the signal-to-noise ratio (signal to quantization noise ratio) achieved during transmission. The µ-law algorithm that is primarily used in the digital telecommunication systems of North America and Japan, adapts a companding scheme that can expand small signals and compress large signals especially at the presence of high peak signals. In this paper, we present a novel multi-exponential companding function that can achieve more uniform compression on both large and small signals so that the relative signal strength over the time is preserved. That is, although larger signals may get considerably compressed, unlike µ-law algorithm, it is guaranteed that these signals after companding will definitely not be smaller than expanded signals that were originally small. Performance of the proposed algorithm is compared with µ-law using real audio signal, and results show that the proposed companding algorithm can achieve much smaller quantization errors with a modest increase in computation time.
EN
We introduce the notion of free region of a node in a sensor network. Intuitively, a free region of a node is the connected set of points R in its neighborhood such that the connectivity of the network remains the same when the node is moved to any point in R. We characterize several properties of free regions and develop an efficient algorithm for computing them. We capture free region in terms of related notions called in-free region and out-free region. We present an O(n2) algorithm for constructing the free region of a node, where n is the number of nodes in the network.
EN
This paper discusses the symbolic functional decomposition method for implementing finite state machines in field-programmable gate array devices. This method is a viable alternative to the presently widespread two-step approaches to the problem, which consist of separate encoding and mapping stages; the proposed method does not have a separate decomposition step - instead, the state's final encoding is introduced gradually on every decomposition iteration. Along with general description of the functional symbolic decomposition method's steps, the paper discusses various algorithms implementing the method and presents an example realisation of the most interesting algorithm. In the end, the paper compares the results obtained using this method on standard benchmark FSMs and shows the advantages of this method over other state-of-the-art solutions.
EN
The manual interpretation of MRI slices based on visual examination by radiologist/physician may lead to missing diagnosis when a large number of MRJs arc analyzed. To avoid the human error, an automated intelligent classification system is proposed. This research paper proposes an intelligent classification technique to the problem of classifying four types of brain abnormalities viz. Metastases, Meningiomas, Gliomas, and Astrocytomas. The abnormalities are classified based on Two/Three/ Four class classification using statistical and texlural features. In this work, classification techniques based on Least Squares Support Vector Machine (LS-SVM) using textural features computed from the MR images of patient are developed. LS-SVM classifier using non-linear radial basis function (RBF) kernels is compared with other techniques such as SVM classifier and K-Ncarest Neighbor (K-NN) classifier. It has been observed that the method proposed using LS-SVM classifier outperforms all the other classifiers tested.
EN
We consider the problem of computing m shortest paths between a source node s and a target node t in a stage graph. Polynomial time algorithms known to solve this problem use complicated data structures. This paper proposes a very simple algorithm for computing all m shortest paths in a stage graph efficiently. The proposed algorithm does not use any complicated data structure and can be implemented in a straightforward way by using only array data structure. This problem appears as a sub-problem for planning risk reduced multiple k-legged trajectories for aerial vehicles.
13
Content available remote An efficiency measure of FPGA based logic synthesis tools
EN
In FPGA - based designs, the number of LOgic Cells (LCs) needed is an important criterion to judge whether a desing is good or not. But the total number of LCs needed to implement a circuit differs vastly from tool to tool. Normally, vendor software use more LCs than the theoretical maximum needed by functional decomposition to implement a circuit. Academic software uses less number of LCs. So far, we are aware of any technique that would give a quantitative measure to judge the comparable silicon area efficiency of a logic synthesis tool. This paper presents a technique to calculate the minmax number of logic cells (Q) which are necedssary to implement a logic circuit.
PL
W projektach wykonanych w technologii FPGA liczba komórek logicznych (KL) jest ważną miarą oceny jakości, pozwala ona udzielić odpowiedzi na pytanie: czy jest to dobry projekt, czy tez nie. Liczba KL potrzebnych do realizacji układu logicznego jest istotnie zależna od używanego do projektowania narzedzia CAD. Oprogramowanie komercyjne wykorzystuje więcej KL niż tyle ile wynika z rozważań teoretycznych, dotyczacych dekompozycji funkcjonalnej układów logicznych. Oprogramowanie akademickie używa mniejszej liczby KL. Dotychczas, nie znalśmy żadnej techniki, która pozwalałaby ocenić wymaganą powierzchnię krzemu potrzebną do realizacji projektu w technice FPGA. W artykule prezentujemy motodę pozwalajacą wyznaczyć ograniczenie górne liczby KL. W pracy wykażemy poprawność tego oszacowania.
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