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2 International Journal of Microelectronics and Computer Science

2 2017

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Design of low power analog front-end for 13.56MHz RFID transponder

Saleh S., Osman M., Hamdy G., Zaki A., Elsemary H.

International Journal of Microelectronics and Computer Science

2017

Vol. 8, nr 4

146--149

This paper presents the design of 13.56MHz RF Front-end circuit for low-power medical applications. It converts RF power into DC and then extracts the clock and the data. The design includes rectifier, voltage multiplier, voltage regulator, data demodulator, ring oscillator, RF voltage limiter and LC matching network. It provides an excellent trade-off between high performance, simplicity of architecture, and low power consumption. It is designed to be fully integrated on chip. Simulation is done using 0.35-μm CMOS technology and the results are compared with other reported RFID systems. The total power consumption is adjusted to be around 4 μW at the minimum input power.

Design of high-performance PFD-CP for 403MHz CMOS fractional-N frequency synthesizer

Saleh S., Hamdy G., Elsemary H., Zaki A.

International Journal of Microelectronics and Computer Science

2017

Vol. 8, nr 3

97--100

This brief discusses the challenges and employs a novel charge-pump and a PFD/CP linearization technique to improve the performance of a 403MHz fractional-N PLL. Techniques are proposed to improve the linearity of the PLL by forcing the PFD/CP to operate in a linear part of its transfer characteristics, while the charge-pump minimizes the current mismatch between the up and down currents by using feedback. The circuit is designed in 0.13jim CMOS process and consumes a total power of 2.6mW. The simulation results show that the synthesizer has a phase noise of-128dBc/Hz at 1MHz offset.