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1

Improvement of Input Power Factor in PWM AC Chopper by Selecting the Optimal Parameters

Aurasopon A., Khamsen W.

Przegląd Elektrotechniczny

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2013

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R. 89, nr 10

210-216

EN

A technique for selecting the element values of the PWM AC chopper circuits to improve the input power factor is presented. This technique analyzes the phase angles of input current, output current and voltage for selecting the optimal value of the filter capacitance. This produces the phase angle of input current in phase with that of input voltage. Therefore, the PWM AC chopper can operate at unity input power factor. The simulation by PSpice program and experimental results are used to verify the proposed technique.

PL

Zaprezentowano metodę selekcji elementów choppera PWM AC w celu poprawy wejściowego współczynnika mocy. Metoda polega na analizie kąta fazowego prądu wejściowego, prądu wyjściowego i napięcia w celu optymalizacji pojemności filtru. Dzięki temu chopper pracuje przy współczynniku mocy równym 1.

2

An Improvement of CMOS Voltage Reference

Punyawong W., Sa-Ngiamvibool W., Aurasopon A., Hongprasit S.

Przegląd Elektrotechniczny

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2013

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R. 89, nr 6

109--112

EN

This paper presents a CMOS voltage reference design, which is widely used in electronic circuits, both analog and digital circuits. In the conventional, a CMOS voltage reference circuit design composed of several MOS transistors and complicated circuits, the output voltage cannot be adjusted to any levels. Therefore, in this paper proposed the CMOS voltage reference circuit design technique based on current combination circuit, which it was reduced number of MOS transistors and the proposed circuit is able to operate without complex startup circuit. The performance of the proposed circuit is confirmed through PSPICE simulation results, the circuit can be operated with supply voltage varies from 1.85 - 4 V, the output voltage reference is about 500±2.5 mV at wide temperature range of -58 oC to 120°C, it has very low temperature coefficient of about 61.19 ppm/ °C, and low power dissipation is 5.51 μW.

PL

W artykule opisano ulepszone źródło napięcia wzorcowego w technologii CMOS. W ulepszonej technologii wykorzystuje się mniej tranzystorów a możliwość ustawiania napięcia jest bardziej uniwersalna niż w typowych układach tego typu.

3

Design of Bandgap Core and Startup Circuits for All CMOS Bandgap Voltage Reference

Hongprasit S., Sa-Ngiamvibool W., Aurasopon A.

Przegląd Elektrotechniczny

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2012

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R. 88, nr 4a

277-280

EN

This paper proposes a new self-biased op-ampˇŚs startup circuit design and improved bandgap core circuit for all CMOS bandgap voltage reference (BGR). In a conventional BGR circuit, the startup circuit may be designed either be required an external power on reset signal (POR) or composed of several MOS transistors for generating bias current and the bandgap core circuits has two nodes that are controlled currents and voltages by resistors of the same value. The new startup circuit presented here is designed by using only one NMOS transistor with circuit solutions suitable for low supply-voltage operation and achieved the correct bias point stability at the power on and the bandgap core circuit is defined the currents and voltages only one node which can be controlled by input voltages definition of op-amp are equalized for reducing the number of resistor. The simulation results indicate reference voltage of about 500.2 mV, temperature coefficient(TC) of 5ppm/˘XC, which can be successfully operated with a minimum power supply of 1.2V at a temperature of 0-100˘XC and a total power dissipation of 10.7 �ÝW at room temperature.

PL

W artykule zaproponowano nowe możliwości projektowania CMOS pasmowych wzorców napięcia. W obwodach konwencjonalnych wymaga ne jest użycie zewnętrznego sygnału resetu albo użycie kilku tranzystorów MOS generujących prąd polaryzacji. W nowej koncepcji wykorzystywane są tylko tranzystory NMOS co umożliwia pracę przy niskim napięciu zasilającym.