Przedstawiona praca ma charakter doświadczalno-teoretyczny. W części doświadczalnej przeprowadzono badania rozpadu rozproszonych w wodzie kropel oleju silikonowego. Badania prowadzono w przepływowym mieszalniku typu rotor-stator (Silverson), pracującym w sposób ciągły. Modelowanie prowadzono wykorzystując oprogramowanie CFD i multifraktalny model burzliwości. Wyniki obliczeń pokazały zgodność trendów z wynikami doświadczalnymi.
EN
The work deals with numerical and experimental investigations of drop breakup during the formation of emulsions. Silicon oil was applied to investigate drop dispersion in the in-line Silverson rotor-stator mixer. Experimental results were interpreted using CFD and the multifractal model oi intermittent turbulence. Predicted trends of influence of process parameters on drop size agree with experimental data.
The transition regions of GdSiO/SiOx and HfO2/ SiOx interfaces have been studied with the high-k layers deposited on silicon substrates. The existence of transition regions was verified by medium energy ion scattering (MEIS) data and transmission electron microscopy (TEM). From measurements of thermally stimulated current (TSC), electron states were found in the transition region of the HfO2/SiOx structures, exhibiting instability attributed to the flexible structural molecular network expected to surround the trap volumes. The investigations were focused especially on whether the trap states belong to an agglomeration consisting of a single charge polarity or of a dipole constellation. We found that flat-band voltage shifts of MOS structures, that reach constant values for increasing oxide thickness, cannot be taken as unique evidence for the existence of dipole layers.
Over the last decade there has been a significant amount of research dedicated to finding a suitable high-k/metal gate stack to replace conventional SiON/poly-Si electrodes. Materials innovations and dedicated engineering work has enabled the transition from research lab to 300 mm production a reality, thereby making high-k/metal gate technology a pathway for continued transistor scaling. In this paper, we will present current status and trends in rare earthbased materials innovations; in particular Gd-based, for the high-k/metal gate technology in the 22 nm node. Key issues and challenges for the 22 nm node and beyond are also highlighted.
The paper reviews recent work in the area of high-k dielectrics for application as the gate oxide in advanced MOSFETs. Following a review of relevant dielectric physics, we discuss challenges and issues relating to characterization of the dielectrics, which are compounded by electron trapping phenomena in the microsecond regime. Nearly all practical methods of preparation result in a thin interfacial layer generally of the form SiOx or a mixed oxide between Si and the high-k so that the extraction of the dielectric constant is complicated and values must be qualified by error analysis. The discussion is initially focussed on HfO2 but recognizing the propensity for crystallization of that material at modest temperatures, we discuss and review also, hafnia silicates and aluminates which have the potential for integration into a full CMOS process. The paper is concluded with a perspective on material contenders for the "end of road map" at the 22 nm node.
There is a well recognised need to introduce new materials and device architectures to Si technology to achieve the objectives set by the international roadmap. This paper summarises our work in two areas: vertical MOSFETs, which can allow increased current drive per unit area of Si chip and SiGe HBT's in silicon-on-insulator technology, which bring together and promise to extend the very high frequency performance of SiGe HBT's with SOI-CMOS.
The paper describes recent progress for the introduction of silicon-germanium, bipolar and field effect heterostructure transistors into mainstream integrated circuit application. Basic underlying concepts and device architectures which give rise to the desired performance advantages are described together with the latest state-of the-art results for HBT and MOSFET devices. The integration of such devices into viable HBT, BiCMOS and CMOS is reviewed. Other contributions that SiGe can make to enhance the performance of ULSI circuits are mentioned also.
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