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1

Analysis and investigation of Schottky barrier MOSFET current injection with process and device simulation

Schwarz Mike, Calvet Laurie E., Snyder John P., Krauss Tillmann, Schwalke Udo, Kloes Alexander

International Journal of Microelectronics and Computer Science

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2018

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Vol. 9, nr 1

1--8

EN

In this paper we focus on the implementation of a process flow of SB-MOSFETs into the process simulator of the Synopsys TCAD Sentaurus tool-chain. An improved structure containing topography is briefly discussed and further device simulations are applied with the latest physical models available. Key parameters are discussed and finally the results are compared with fabricated SB-MOSFETs in terms of accuracy and capability of process simulations.

2

Carrier transport mechanisms in the ZnO based heterojunctions grown by MBE

Płaczek-Popko E., Paradowska K. M., Pietrzyk M. A., Kozanecki A.

Opto-Electronics Review

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2017

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Vol. 25, No. 3

181--187

EN

This paper presents a review of models of the current transport in different kind of heterojunctions (HJs) and their characteristics. In order to effectively deduce the dominant electron transport for the HJs based on ZnO or Zn1−xMgxO layers grown on Si substrate by MBE a comparison is performed – which type of the HJ exhibits better electrical properties. The current–voltage characteristics for the studied HJs were measured within 280–300 K. The transport properties of the HJs are explained in terms of Anderson model with reference to aforementioned current transport models. It is found, that the mechanisms of current transport for all of the studied HJs are similar. At a low forward voltage bias the tunneling current dominates while at medium voltage bias (0.5–1 V) multitunneling capture-emission prevails with the electron trap located at 0.1–0.25 eV below the bottom of a ZnO (Zn1−xMgxO) conduction band. Beyond this voltage bias space charge limited current governs the current transport.

3

Simulation framework and thorough analysis of the impact of barrier lowering on the current in SB-MOSFETs

Schwarz M., Calvet L. E., Snyde J. P., Krauss T., Schwalke U., Kloes A.

International Journal of Microelectronics and Computer Science

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2017

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Vol. 8, nr 2

72--79

EN

In this paper we present a simulation framework to account for the Schottky barrier lowering models in SBMOSFETs within the Synopsys TCAD Sentaurus tool-chain. The improved Schottky barrier lowering model for field emission is considered. A strategy to extract the different current components and thus accurately predict the on- and off-current regions are adressed. Detailed investigations of these components are presented along with an improved Schottky barrier lowering model for field emission. Finally, a comparison for the transfer characteristics is shown for simulation and experimental data.

4

SOI nanodevices and materials for CMOS ULSI

Palestra F.

Journal of Telecommunications and Information Technology

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2007

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nr 2

3-13

EN

A review of recently explored new effects in SOI nanodevices and materials is given. Recent advances in the understanding of the sensitivity of electron and hole transport to the tensile or compressive uniaxial and biaxial strains in thin film SOI are presented. The performance and physical mechanisms are also addressed in multi-gate Si, SiGe and Ge MOSFETs. The impact of gate misalignment or underlap, as well as the use of the back gate for charge storage in double-gate nanodevices and of capacitorless DRAMare also outlined.