As it contains elements of complete digital impedance meter, the AD5933 integrated circuit is an interesting solution for impedance measurements. However, its use for measurements in a wide range of impedances and frequencies requires an additional digital and analogue circuitry. This paper presents the design and performance of a simple impedance meter based on the AD5933 IC. Apart from the AD5933 IC it consists of a clock generator with a programmable prescaler, a novel DC offset canceller for the excitation signal based on peak detectors and a current to voltage converter with switchable conversion ratios. The authors proposed a simple method for choosing the measurement frequency to minimalize errors resulting from the spectral leakage and distortion caused by a lack of an anti-aliasing filter in the DDS generator. Additionally, a novel method for the AD5933 IC calibration was proposed. It consists in a mathematical compensation of the systematic error occurring in the argument of the value returned from the AD5933 IC as a result. The performance of the whole system is demonstrated in an exemplary measurement.
The paper discloses the idea of a new structure for a Test Pattern Generator (TPG) for detection of crosstalk faults that may happen to bus-type interconnections between built in blocks within a System-on-Chip structure. The new idea is an improvement of the TPG design proposed by the author in one of the previous studies. The TPG circuit is meant to generate test sequences that guarantee detection of all crosstalk faults with the capacitive nature that may occur between individual lines within an interconnecting bus. The study comprises a synthesizable and parameterized model developed for the presented TPG in the VLSI Hardware Description Language (VHDL) with further investigation of properties and features of the offered module. The significant advantages of the proposed TPG structure include less area occupied on a chip and higher operation frequency as compared to other solutions. In addition, the design demonstrates good scalability in terms of both the hardware overhead and the length of the generated test sequence.
W pracy przedstawione są korzyści i problemy związane z wykorzystaniem systemów na czipie (System on a Chip - SoC) zawierających jednocześnie komórki analogowe i cyfrowe. Opisane jest wykorzystanie technik z przełączanymi prądami (switched current - Sl) oraz z przełączanymi kondensatorami (switched capacitor - SC) do projektowania komórek analogowych. Na przykładzie podstawowych komórek Sl omawiane są narzędzia do automatyzacji ich projektowania. Jako przykładowe urządzenia przenośne, w których stosuje się SoC są opisane cyfrowe aparaty fotograficzne.
EN
In the paper benefits an problems are presented we have using analog and digital cells in the same System on a Chip (SoC). It is described application of switched current (Sl) and switched capacitor (SC) techniques for analog celi design. Tools for design automation are presented with the use of basie Sl cells as an illustration. Digital cameras are described as an example of portable devices in which SoC is implemented.
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