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Calibration of a mixed-signal power network transient stability analysis emulator

Lanz G, Fabre L., Lilis G, Kyriakidis T, Sallin D, Cherkaoui R., Kayal M.

International Journal of Microelectronics and Computer Science

2013

Vol. 4, nr 4

142--147

The emerging ﬁeld of power system emulation for real time smart grid management is very demanding in terms of speed and accuracy. This paper provides detailed information about the electronics calibration process of a high-speed power network emulator dedicated to the transient stability analysis of power systems. This emulator uses mixed-signal hardware to model the dynamic behavior of a power network. Special design allows the self-calibration of the analog electronics through successive measurements and correction steps. The calibration operation guarantees high resolution of the transient stability analysis results, so that they can be reliably used for operational planning and control on real power networks.

Early Power Estimation of Mixed-Signal Design

Kotynia Ł., Sathyamurthy M., Neumann F., Hennig E.

International Journal of Microelectronics and Computer Science

2012

Vol. 3, nr 4

138-145

In this paper, we present the idea of using dynamic power estimation during the system-level design. A mixed-signal wireless IC with energy harvesting is used as an example of a device where power exploration and optimization plays a key role during the architecture planning. The novelty of this approach lies in introducing the activity profile for the mixed-signal chip as an important indicator of the power consumption that can drive the design phase. The method presented in this paper is based on modeling of the complete chip in order to apply it with a mixed-language Universal Verification Methodology (UVM) environment. It was decided to use the Verilog-D, SystemVerilog and Verilog-AMS languages to represent behavior of the digital and analog/mixed-signal parts of the chip.