When designing in Smart Power technologies, TCAD simulations are mandatory to design effective passive protections against parasitic couplings due to minority carriers. The objective of this paper is to propose a SPICE-based approach to characterize electrical key parameters of a passive protection directly within standard IC design flow avoiding time consuming TCAD simulations. Our approach consists in integrating a new substrate model in SPICE to enable designers to derive themselves process specific design rules and reduce substrate couplings. This methodology enables designers to access valuable results in the early stage of IC design, where before such results could be obtained only in the final verification step.
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Minority carriers diffusion in Smart Power ICs substrate can be simulated in standard spice-like software using the EPFL Substrate Model. This model is based on a parasitic substrate network extracted from the integrated circuit layout following a given meshing strategy. In this work Design of Experiments (DOE) techniques are used to run a limited number of simulations to evaluate the influence of the meshing strategy on the accuracy of the model when compared to Technology Computer Aided Design (TCAD) simulations. A parasitic lateral BJT will be analyzed as two-dimensional case study with both spice-like and finite element simulations for the minority carriers diffusion. Using statistical analysis a linear model is developed to discover the main geometrical domains influencing the accuracy of the studied model.
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This paper presents an equivalent electrical circuit for substrate minority carriers SPICE simulation. The electrical circuit parameters are extracted from substrate meshing applying the finite difference method. This model is derived from a linearization of drift-diffusion equations and not from the closed form solution. Further, the proposed circuit is solved with available SPICE simulators because of electrical analogies with physical quantities. As a result, the minority carrier diffusion current is included automatically in the total substrate current computation. SPICE simulation results are compared with device simulator results for the one and three-dimensional cases.
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