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Exact parallel critical path fault tracing to speed-up fault simulation in sequential circuits

Kõusaar Jaak, Kostin Sergei, Ubar Raimund, Devadze Sergei, Raik Jaan

International Journal of Microelectronics and Computer Science

2018

Vol. 9, nr 1

9--18

We propose a new method to speed up stuck-at fault simulation for sequential circuits. The method combines exact parallel critical path tracing of faults, used so far only for combinational circuits, with traditional fault simulation in sequential circuits. For that purpose, formulas are developed for classification of faults into two classes: the faults eligible for parallel critical path tracing, and the faults which have to be simulated over the global feedbacks in the circuit by traditional methods. Combining these two approaches in fault simulation ‒ the combinational and sequential simulation concepts ‒ allows dramatic speed-up of fault simulation in sequential circuits, which is demonstrated by experimental results.

Synthesis of FSMs Based on Architectural Decomposition with Joined Multiple Encoding

Bukowiec A.

International Journal of Electronics and Telecommunications

2012

Vol, 58, No. 1

35-41

The method of synthesis of the logic circuit of finite state machine (FSM) with Mealy's outputs is proposed in this paper. Proposed method is based on the innovate encoding of microinstructions split into subsets. Code of microinstruction is represented as a part of current state code and code of microinstruction inside of current subset. It leads to realization of FSM as s double-level structure. It leads to diminishing of number of variables required for encoding of microinstructions. Such approach permits to decrease the number of required outputs of combinational part of FSM.

Obliczanie mocy układów sekwencyjnych

Salauyou V., Grześ T.

Elektronika : konstrukcje, technologie, zastosowania

2005

Vol. 46, nr 4

25-27

Zaproponowano metodę obliczania mocy układów sekwencyjnych, modelem matematycznym jest automat skończony. Jest ona połączeniem metod proponowanych przez różnych autorów. Jest to metoda uniwersalna, pozwalająca oszacować moc traconą przez układ sekwencyjny. Podano przykład obliczania mocy układu sekwencyjnego, jak również wyniki badań eksperymentalnych dla standardowych układów testowych.

In this article the sequential circiuts power calculation method is proposed. Mathematical model of sequential circuits is finite state machine. Described method is a combination of methods proposed by various authors. It is universal method that can estimate power dissipated by sequential circiut. The power calculation example, as well as experimental results for standard benchmarks are shown in paper.