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1

Parameters of the Signal: Their Non-Locality vs. Averaging Character

Smołalski G.

Measurement Automation Monitoring

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2016

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Vol. 62, No. 11

354--360

EN

A parameter of the signal segment is regarded as a measurand here. In a set of parameters the support of which consists of more than one element, a subset of averaging parameters is defined as those being reflexive, symmetric, bisymmetric, increasing monotonic, cancellable and continuous. These attributes, previously defined for discrete operations (B. Ellis, J. Pfanzagl), are in Section 3 reformulated for functional operations projecting signal segments into real numbers. Their meanings are explained and examples are given. Then, in Section 4, it is analysed to what degree these theoretical attributes are achieved in three kinds of circuits: in a low pass RC filter, in an integrator, and in a sample-and–hold circuit (S/H). The coefficient (12) was proposed for the evaluation of the circuit’s ability to provide a symmetric parameter. This attribute, although possessed by the integrator almost perfectly, is not achievable in the filter and S/H circuit. Thus the quasi-instant parameters provided by the S/H cannot be considered as averaged. The period of an effective influence of the input signal on the output voltage, and the delay introduced by the S/H circuit, are defined.

2

Sampling Jitter in Audio A/D Converters

Kulka Z.

Archives of Acoustics

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2011

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Vol. 36, No. 4

831-849

EN

This paper provides an overview of the effects of timing jitter in audio sampling analog-to-digital converters (ADCs), i.e. PCM (conventional or Nyquist sampling) ADCs and sigma-delta (ΣΔ) ADCs. Jitter in a digital audio is often defined as short- term fluctuations of the sampling instants of a digital signal from their ideal positions in time. The influence of the jitter increases particularly with the improvements in both resolution and sampling rate of today’s audio ADCs. At higher frequencies of the input signals the sampling jitter becomes a dominant factor in limiting the ADCs performance in terms of signal-to-noise ratio (SNR) and dynamic range (DR).

3

Wpływ układu kluczującego na dokładność odwzorowania napięcia w układach próbkująco-pamiętających realizowanych w scalonej technologii CMOS

Król K., Piwowarska E.

Elektronika : konstrukcje, technologie, zastosowania

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2010

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Vol. 51, nr 7

86-89

PL

W artykule przedstawiono wpływ realizacji układu kluczującego na dokładność układu próbkująco-pamiętającego zaprojektowanego w scalonej technologii CMOS 350 nm. Przeanalizowano zachowanie prostych kluczy NMOS, PMOS oraz CMOS. Następnie zaprojektowano i przeanalizowano układy kluczy o specjalnej konstrukcji, wykorzystujące efekt bootstrepu. Praktyczne zastosowanie otrzymanych wyników zilustrowano projektem 12-bitowego, szybkiego układu próbkująco-pamiętającego opartego o architekturę z millerowską pojemnością próbkującą.

EN

In this article the influence of a switching circuit realization on accuracy of voltage sample-and-hold circuit is shown. Switching circuits were designed and investigated in CMOS 350 nm technology. The influence of using simple single NMOS and PMOS transistor and CMOS transistor pair on the circuit accuracy were shown. Then, a special bootstrep switching circuits were designed and investigated. Practical application of obtained results was shown by designing and analyzing 12-bit fast sample-and-hold circuit based on miller capacitance architecture.