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EN
Shrinking gate length in conventional MOSFETs leads to increasing short channel effects like source-to-drain (SD) tunneling. Compact modeling designers are challenged to model these quantum mechanical effects. The complexity lies in the set-up between time efficiency, physical model relation and analytical equations. Multi-scale simulation bridges the gap between compact models, its fast and efficient calculation of the device terminal voltages, and numerical device models which consider the effects of nanoscale devices. These numerical models iterate between Poisson- and Schroedinger equation which significantly slows down the simulation performance. The physicsbased consideration of quantum effects like the SD tunneling makes the non-equilibrium Green’s function (NEGF) to a stateof-the-art method for the simulation of devices in the sub 10 nm region. This work introduces a semi-analytical NEGF model for ultra-short DG MOSFETs. Applying the closed-form potential solution of a classical compact model, the model turns the NEGF from an iterative numerical solution into a straightforward calculation. The applied mathematical approximations speed up the calculation time of the 1D NEGF. The model results for the ballistic channel current in DG-MOSFETs are compared with numerical NanoMOS TCAD [1] simulation data. Shown is the accurate potential calculation as well as the good agreement of the current characteristic for temperatures down to 75 K for channel lengths from 6 nm to 20 nm and channel thickness from 1.5 nm to 3 nm.
EN
A compact model of a high-k HfO2-Ta2O5 mixed layer capacitor stack is developed in Matlab. Model equations are based on the surface potential PSP model. After fitting the C-V characteristics in Matlab the model is coded in Verilog-A hardware description language and it is implemented as external library in Spectre circuit simulator within Cadence CAD system. The results are validated against the experimental measurements of the HfO2-Ta2O5 stack structure.
EN
A circuit simulation model of a MOS capacitor with high-k HfO2-Ta2O5 mixed layer is developed and coded in Verilog-A hardware description language. Model equations are based on the BSIM3v3 model core. Capacitance-voltage (C-V) and current-voltage (I-V) characteristics are simulated in Spectre circuit simulator within Cadence CAD system and validated against experimental measurements of the HfO2-Ta2O5 slack structure.
EN
A compact physical model of the Insulated Gate Bipolar Transistor has been presented. It has been based on the modular approach where the semiconductor structure is represented with several modules. The most important is the charge storage region where excess carriers are described with the ambipolar diffusion equation which enables obtaining carrier concentralion distribution along the wide, lightly doped base. In the future, it will enable implementing a dynamic device model. The model has been implemented in SPICE source code, which makes it accessible for the average electronic engineer.
PL
Przedstawiony został kompaktowy model fizyczny tranzystora IGBT. Jest on oparty na podejściu modułowym, w którym struktura półprzewodnikowa odzwierciedlona jest za pomocą szeregu modułów. Najistotniejszym z nich jest obszar składowania ładunku, w którym nośniki nadmiarowe opisane są równaniem dyfuzji ambipolarnej, które umożliwia otrzymanie rozkładu koncentracji nośników wzdłuż szerokiej, słabo domieszkowanej bazy. W przyszłości możliwa będzie implementacja dynamicznego modelu przyrządu. Model został zaimplementowany w kodzie źródłowym symulatora SPICE, co czyni go dostępnym dla przeciętnego inżyniera elektronika.
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