Wyniki wyszukiwania - BazTech

Ograniczanie wyników

2 International Journal of Electronics and Telecommunications

Znaleziono wyników: 2

Liczba wyników na stronie

Wyniki wyszukiwania

Wyszukiwano:
w słowach kluczowych: minimum energy point

Sortuj według:

Ogranicz wyniki do:

Analysis of High-Performance Near-threshold Dual Mode Logic Design

Bikki Pavankumar

International Journal of Electronics and Telecommunications

2019

Vol. 65, No. 4

723--729

A novel dual mode logic (DML) model has a superior energy-performance compare to CMOS logic. The DML model has unique feature that allows switching between both modes of operation as per the real-time system requirements. The DML functions in two dissimilar modes (static and dynamic) of operation with its specific features, to selectively obtain either low-energy or high-performance. The sub-threshold region DML achieves minimum-energy. However, sub-threshold region consequence in performance is enormous. In this paper, the working of DML model in the moderate inversion region has been explored. The near-threshold region holds much of the energy saving of subthreshold designs, along with improved performance. Furthermore, robustness to supply voltage and sensitivity to the process temperature variations are presented. Monte carol analysis shows that the projected near-threshold region has minimum energy along with the moderate performance.

Ultra Low Power Design for Digital CMOS Circuits Operating Near Threshold

Kalra S., Bhattacharyya A. B.

International Journal of Electronics and Telecommunications

2017

Vol. 63, No. 4

369--374

Circuits operating in the subthreshold region are synonymous to low energy operation. However, the penalty in performance is colossal. In this paper, we investigate how designing in moderate inversion region recuperates some of that lost performance, while remaining very near to the minimum energy point. An α power based minimum energy delay modeling that is continuous over the weak, moderate, and strong inversion regions is presented. The value of α is obtained through interpolation following EKV model. The effect of supply voltage and device sizing on the minimum energy and performance is determined. The proposed model is utilized to design a temperature to time generator at 32nm technology node as the application of the proposed model. The abstract goes here.