Wyniki wyszukiwania - BazTech

1

Multi-input Memristor rationed logic full adder circuit for efficient processing time

Yamtim Suparlerk, Tooprakai Siraphop

Przegląd Elektrotechniczny

|

2022

|

R. 98, nr 6

88--94

EN

This research proposes a multi-input memristor rationed logic (MRL) 1-bit full adder circuit as an alternative to conventional multi-stage MRL full adders. The proposed multi-input 1-bit full adder circuit consisted of 25 memristors without CMOS transistor. Ripple carry adder was utilized to realize multi-input MRL 8-bit full adder circuit by cascading eight blocks of multi-input MRL 1-bit full adder. The advantages of the multi-input MRL 8-bit full adder include straightforwardness, compactness, and improved delay time. Simulations were carried out by using LTspice simulator and results compared with multi-stage full adders. The multi-input MRL 8-bit full adder circuit achieved higher processing-time efficiency and thereby holds great potential as an alternative to multi-stage full adders. The novelty of this research lies in the use of multi-input MRL technique to realize full adder circuits that effectively mitigate voltage degradation and improve delay time.

PL

Badania te proponują wielowejściowy układ memristor rationed logic (MRL) 1-bitowego pełnego sumatora jako alternatywę dla konwencjonalnych wielostopniowych sumatorów MRL. Proponowany wielowejściowy 1-bitowy układ pełnego sumatora składał się z 25 memrystorów bez tranzystora CMOS. Sumator przenoszenia Ripple został wykorzystany do realizacji wielowejściowego 8-bitowego pełnego sumatora MRL poprzez kaskadowanie ośmiu bloków wielowejściowego 1-bitowego pełnego sumatora MRL. Zalety wielowejściowego, 8-bitowego pełnego sumatora MRL obejmują prostotę, zwartość i poprawiony czas opóźnienia. Symulacje przeprowadzono przy użyciu symulatora LTspice, a wyniki porównano z wielostopniowymi pełnymi sumatorami. Obwód wielowejściowego 8-bitowego pełnego sumatora MRL osiągnął wyższą wydajność w czasie przetwarzania, a tym samym ma ogromny potencjał jako alternatywa dla wielostopniowych pełnych sumatorów. Nowość tych badań polega na wykorzystaniu wielowejściowej techniki MRL do realizacji pełnych obwodów sumatorów, które skutecznie łagodzą degradację napięcia i poprawiają czas opóźnienia.

2

DNA Ion Detector and Logic Circulation Amplification Model Based on Mercury and Silver Ions

Guo Bingjie, Wang Luhui, Wu Tao, Dong Yafei

Fundamenta Informaticae

|

2019

|

Vol. 164, nr 2-3

195--205

EN

Here, two two-way ion detector (TWID) and one DNA cascade logic circuit and signal amplifier model had been created. Firstly, we have constructed two bidirectional mercury and silver ion detectors, both of which can be used to detect mercury and silver ions at the same time, that means a single molecule can detect two kinds of heavy metal ions at the same time. The unique design of the switches offers significant advantages over existing methods. In addition, the two bidirectional ion detectors enable the design of the logic gates (OR, AND) using Ag+ and Hg2+ as inputs. Secondly, we constructed a two-level “AND” logic gate by combining the above two logic gates. This logic model takes the output of “OR” logic gate as the input of the next logic gate, which not only realizes the logic operation, but also achieves the function of signal amplification. We are able to recognize the logic output signals effortlessly by observing the amount of fluorescence. It’s a simple, economic and safe approach for the design of a complex multiple-input DNA logic circulation amplification model. Finally, we proved the feasibility of our model by PAGE and fluorescence alteration.

3

Molecular NOR logic gate

Wąsiewicz P., Wójtowicz-Krawiec A., Płucienniczak A.

Prace Naukowe Politechniki Warszawskiej. Elektronika

|

2008

|

z. 165

237-244

EN

Molecular computing created for implementing logic systems, solving NP-difficult problems on nanoscale depends on DNA self-assembly abilities and on modifying DNA with the help of enzymes during genetic operations. In the typical DNA computing a sequence of operations executed on DNA molecules in parallel is called an algorithm, which is also determined by a model of DNA chains. This methodology is similar to the soft hardware specialized architecture driven here by heating, cooling and enzymes, especially polymerases used for copying strings. This work presents a unique approach to implementation of OR, NOR logic gates on molecules. It requires the representation of signals by DNA molecules. The presented method allows for constructing logic gates with many inputs and for executing them at the same quantity of elementary operations, regardless of a number of input signals. The NOR gate was implemented with the help of modified polymerase Taq, which stops its activity, when it meets a molecular obstacle on its way. The appropriate experiment was conducted to confirm the possibilities of the suggested implementation. Laboratory results were discussed.