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1 Electronics and Telecommunications Quarterly

1 2007

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Investigation of substrate noise coupling and isolation characteristics for a 0,35 μm HV CMOS technology

Pflanzl W. C., Seebacher E.

Electronics and Telecommunications Quarterly

2007

Vol. 53, No 4

379-388

This paper presents the characterization of substrate noise coupling and the isolation capability of ohmic substrate contacts in a HV CMOS technology. Layout variations of contact sizes, distances, and several p+ guard structures are subject of this research. Metal shielded DUT fixtures have been developed to improve the reliability and accuracy of the measurements. All test cases are fabricated with a 0.35 μm HV CMOS technology (Vmax <= 120V). This process features high resistive native substrate (20 Ohm.cm) together with a 0.5 Ohm.cm pwell. The modeling section describes the distributed substrate "resistor" and the DUT fixture behavior.