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Intravenous glucose tolerance test hardware implementation

Kulakovskis D., Sledevič T., Gedminas A., Navakauskas D.

Bulletin of the Polish Academy of Sciences. Technical Sciences

2020

Vol. 68, nr 6

1245--1255

Blood glucose level monitoring and control is of utmost importance to millions of people who have been diagnosed with diabetes or similar illnesses. One of the conventional tests for measuring how the human body breaks down glucose is IVGTT, the Intravenous Glucose Tolerance Test. The difficulty of computing the models of glucose-insulin interaction presents an issue when attempting to implement them in embedded hardware. The Metabolic P (MP), contrary to other models, does not require solving differential equations to compute, thus it could be an effective modelling approach for real-time applications. The present paper proves that MP system methodology-based IVGTT implementation in the Field Programmable Gate Arrays (FPGA) technology is reasonably precise and sufficiently flexible to be used effectively in multi-user scenarios. Presentation of the state-of-the-art focuses on glucose-insulin interaction models, glucose monitoring systems and MP system implementation techniques. Methods for MP system computations and techniques for their implementation on FPGA, together with the original unified MP system implementation technique, have been presented in this paper. The results of an elaborate investigation into the IVGTT MP systems, as well as their single and unified MP implementation techniques have also been considered. It is shown that the techniques developed are applicable to all known IVGTT MP systems, and can achieve RMSE not higher than 15% using a word length of at least 32 bits. The novel MP system combined quality metrics and its pictorial representation allow the analysis of various implementation characteristics. Compared to the unified pipelined IVGTT MP system implementation technique, the developed unified combinational technique ensures a 2‒3 times higher speed.

Generator ciągów losowych wykorzystujący stany metastabilne zaimplementowany w układzie FPGA firmy Xilinx

Kubczak P., Jessa M., Matuszewski Ł.

Pomiary Automatyka Kontrola

2014

R. 60, nr 7

450--452

W wysokiej klasy systemach bezpieczeństwa informacji klucze kryptograficzne nie powinny być generowane na zewnątrz systemu, a klucze prywatne, w przeciwieństwie do publicznych, nigdy nie powinny opuścić systemu. Jeśli system bezpieczeństwa jest realizowany w jednym układzie scalonym, klucze powinny być generowane w tym samym układzie. Realizacja generatorów liczb losowych w cyfrowych układach reprogramowalnych jest więc istotnym zagadnieniem. W artykule przedstawiono nową metodę wytwarzania ciągów losowych, opartą o zjawisko metastabilności występujące w układach cyfrowych oraz uwagi na temat sensowności wykorzystania tego fizycznego efektu występującego we współczesnych, powszechnie dostępnych układach cyfrowych.

The security of cryptographic systems relates mainly to the protection of confidential keys. In high-end information security systems, cryptographic keys should never be generated outside the system and private keys should never leave the system. For the same reason, if the security system is implemented in a single chip (cryptographic system on chip), the keys should be generated inside the same chip. Implementation of random number generators in logic devices, including configurable logic devices, is therefore an important issue. In this paper, we present a new method of generating random digits based on a physical phenomenon occurring in digital circuits. Thus, the proposed generator can be implemented in different Field Programmable Gate Arrays (FPGAs) with other elements of the cryptographic system. If the underlying physical process cannot be controlled, the generator output is unpredictable and/or uncontrollable. The statistical characteristics of TRNGs are closely related to the quality of the entropy source, but also to the randomness extraction method. The statistical quality of the generator was verified with the use of NIST statistical test suite. A discussion of the utility of metastable states for producing random numbers with metastable states in commercially available FPGAs is also presented.