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EN
The paper describes second order generalized integrator (sogi) which is specialized in band-pass filtering and orthogonalization of periodic signals. Modifications of the structure and the influence of parameters on the system performance is described. The article highlights the particular importance of model discretization method in the practical implementation, as well as reviews estimation methods of the: amplitude, frequency, offset and phase angle of the periodic signal. Examples of simulation and experimental results are presented.
EN
This paper presents the design of a digital CMOS integrated circuit implementing a type-2 fuzzy logic controller. The proposed architecture is suitable for serial processing of fuzzy rules combined with parallel processing of upper and lower membership functions of type-2 fuzzy sets. The parameterized VHDL model allows to synthesize the circuit of the required size for a particular application. Moreover, on-chip programming is performed.
PL
W artykule przedstawiono projekt cyfrowego układu scalonego CMOS realizującego sterownik rozmyty 2-go rzędu. Zaproponowana architektura układu umożliwia połączenie sekwencyjnego przetwarzania kolejnych reguł rozmytych z równoległym przetwarzaniem dla górnej i dolnej funkcji przynależności każdego zbioru rozmytego. Uzyskany sparametryzowany model VHDL umożliwia syntezę układu o rozmiarze wymaganym w konkretnej realizacji.
EN
Most industrial processes are characterized by the presence of time delays. These time delays may be intrinsic to the process to be controlled or associated to the controller itself. The Smith Predictor scheme was the most famous control method for controlling stable single-input-single-output linear processes showing a delay in their input or output. Solution to the problems related to robustness as well as those involved in the control of integrating and unstable delayed processes were presented. Most of these solutions do not cover all the situations and, in any case, they lead to complex controllers. This paper reviews the most relevant problems and their solutions in the literature, and a new methodology to design dead-time compensator for stable, integrating and unstable processes is reported. Several illustrative examples show that the robustness and performance of the proposed methodology are similar or better than the more recently proposed dead-time compensators, the design approach being simple and straightforward.
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