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The parametric fault detection algorithm in electronic circuits based in bilinear transformation

Czaja Z.

Prace Naukowe Instytutu Górnictwa Politechniki Wrocławskiej. Konferencje

1999

Vol. 86, nr 24

106-111

The paper deal with algorithm for detecting single parametric faults using bilinear transformation. The algorithm is made up of two parts. The first part is aimed at determination of the optimum frequency providing the most appropriate conditions for measurement and detection of single faults. An exemplary circuit chosen for test (DUT) amounted to fopt =1500 Hz. In the analysis it has been assumed that the measurements are encumbered with measuring errors, and the elements in DUT have tolerance, i.e a measuring point plotted on plane Re(F), Im(F) with a family of arcs to representing variations in values of the elements. The point does not necessarily have to lie on one of the arcs to indicate a fault in DUT. The above problem is elements. The point does not necessarily have to lie on one of the arcs to indicate a fault in DUT. The above problem is solved by the second part of the algorithm which localizes the faulty element by picking out the one situated nearest to the measuring point (according to an accepted criterion). Taking advantage of this algorithm it was possible to prepare a diagram of the areas and identify faults for DUT.