This paper presents the universal address sequence generator (UASG) for memory built-in-self-test. The studies are based on the proposed universal method for generating address sequences with the desired properties for multirun march memory tests. As a mathematical model, a modification of the recursive relation for quasi-random sequence generation is used. For this model, a structural diagram of the hardware implementation is given, of which the basis is a storage device for storing so-called direction numbers of the generation matrix. The form of the generation matrix determines the basic properties of the generated address sequences. The proposed UASG generates a wide spectrum of different address sequences, including the standard ones, such as linear, address complement, gray code, worst-case gate delay, 2i, next address, and pseudorandom. Examples of the use of the proposed methods are considered. The result of the practical implementation of the UASG is presented, and the main characteristics are evaluated.
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Controlled random tests, methods of their generation, as well as their application to the testing of both hardware and software systems are discussed. Available evidences suggest that high computational complexity is one of the main drawback of these methods. Therefore we propose a technique to overcome this problem. In the paper, we introduce the concept of multiple controlled random tests (MCRT) and examine various numerical characteristics in terms of the development of those tests. We prove the effectiveness of the Euclidean distance, as well as we propose an easy computational method of its calculation, in the process of constructing MCRT. The presented approach is evaluated through the experimental study in the context of testing of Random Access Memory (RAM).
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