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Wykorzystanie modułu FPGA platformy sprzętowej sbRIO-9602 do obliczania fazora z zastosowaniem DFT

Barczentewicz S., Nabielec J.

Pomiary Automatyka Kontrola

2014

R. 60, nr 3

141--143

Praca dotyczy problemu implementacji algorytmu obliczania fazora w jednym układzie scalonym FPGA-SPARTAN, w którym jednocześnie zaimplementowany jest protokół komunikacyjny czasu rzeczywistego dostosowany do PSS (Power Stabilization System). Przedstawione rozwiązanie pozwala na implementację takich obliczeń z możliwie najmniejszą objętością zajmowanych zasobów FPGA i przy jak najmniejszych błędach obliczeniowych. Algorytm obliczeń oparty został o dyskretne przekształcenie Fouriera.

This work presents a novel approach to implementation of the phasor estimation algorithm using a single FPGA module, with simultaneous communication protocol compatible with Power Stabilization System on it. The presented implementation allows for calculations using as little resources as possible. This paper is organized as follows. In Section 1 the definitions and convention of graphical representation of phasor and synchrophasor (Fig. 1) given by [1] are quoted. Moreover, the definition of discrete Fourier transform is recalled [4], for explanation of its usage in the presented algorithm. In Section 2 the programming environment LabVIEW FPGA and the used instrumentation (sbRIO-9602 platform with FPGA module Xilinx Spartan, ADC converter NI9215E) are described. Furthermore, the proposed algorithm of phasor estimation is presented. Figure 2 shows the simplified block diagram of the designed algorithm. Afterwards, the methodology and results from the conducted tests are listed. Table 1 presents the resources utilization statistics of FPGA, and Table 2 shows the compilation of the test results of computational errors of module and phase estimation. Phasor estimation algorithm is based on DFT computation, and more specifically only one DFT bin is used when sampling frequency and observation length are known. Algorithm uses this fact to minimize demand for FPGA resources. Conducted tests showed that the main problem with obtaining high accuracy of algorithm is limited precision of fixed-point calculations.

Evaluation of the Accuracy of the Solution to the Heat Conduction Problem with the Interval Method of Crank-Nicolson Type

Jankowska M. A., Sypniewska-Kamińska G., Kamiński H.

Acta Mechanica et Automatica

2012

Vol. 6, no. 1

36-43

The paper deals with the interval method of Crank-Nicolson type used for some initial-boundary value problem for the onedimensional heat conduction equation. The numerical experiments are directed at a short presentation of advantages of the interval solutions obtained in the floating-point interval arithmetic over the approximate ones. It is also shown how we can deal with errors that occur during computations in terms of interval analysis and interval arithmetic.