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Content available remote Limited Asynchronous Spiking Neural P Systems
EN
In a biological system, if a long enough time interval is given, an enabled chemical reaction will finish its reaction in the given time interval. With this motivation, it is natural to impose a bound on the time intervalwhen an enabled spiking rule in a spiking neural P system (SN P system, for short) remains unused. In this work, a new working mode of SN P systems is defined, which is called limited asynchronous mode. In an SN P system working in limited asynchronous mode, if a rule is enabled at some step, this rule is not obligatorily used. From this step on, if the unused rule may be used later, it should be used in the given time interval. If further spikes make the rule non-applicable, then the computation continues in the new circumstances. The computation result of a computation in an SN P system working in limited asynchronous mode is defined as the total number of spikes sent into the environment by the system. It is proved that limited asynchronous SN P systems with standard spiking rules are universal. If the number of spikes present in each neuron of a limited asynchronous SN P system with standard spiking rules is bounded during a computation, then the power of a limited asynchronous SN P system with standard spiking rules falls drastically, and we get a characterization of semilinear sets of numbers.
2
Content available remote Discovery of Asynchronous Concurrent Models from Experimental Tables
EN
The synthesis problem of concurrent systems has earlier been discussed in the literature using different types of formalisms. This paper presents a new method for discovery of asynchronous concurrent models from experimental tables by using a rough set approach. The proposed method can be applied to the automatic data model discovery. The algorithm for constructing asynchronous concurrent models is described in detail. As a model for concurrency the Coloured Petri Nets are used. Constructed asynchronous models can be helpful to solving some problems arising in design of asynchronous digital systems or addressing of nodes in parallel systems. An example illustrates an application of the proposed approach in such problems.
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