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Analogue CMOS ASICs in image processing systems

Jendernalik W., Blakiewicz G., Handkiewicz A., Melosik M.

Metrology and Measurement Systems

2013

Vol. 20, nr 4

613--622

In this paper a survey of analog application specific integrated circuits (ASICs) for low-level image processing, called vision chips, is presented. Due to the specific requirements, the vision chips are designed using different architectures best suited to their functions. The main types of the vision chip architectures and their properties are presented and characterized on selected examples of prototype integrated circuits (ICs) fabricated in complementary metal oxide semiconductor (CMOS) technologies. While discussing the vision chip realizations the importance of low-cost, low-power solutions is highlighted, which are increasingly being used in intelligent consumer equipment. Thanks to the great development of the automated design environments and fabrication methods, new, so far unknown applications of the vision chips become possible, as for example disposable endoscopy capsules for photographing the human gastrointestinal tract for the purposes of medical diagnosis.

Fast Determination of Similarity Between Two Vectors by Means of Analog CMOS Technique

Wojtyna R.

International Journal of Electronics and Telecommunications

2010

Vol. 56, No. 4

417-422

In this paper, an analog approach to determining a resemblance between two multidimensional vectors is proposed. As the resemblance measure, Euclidean distance is used. The main advantage of the presented method is a very high speed of the Euclidean-distance-measure calculations. The achieved high speed results from the fact that most of arithmetic operations needed to realize the calculations are carried out in parallel. This concerns the required operations of squaring a difference of two corresponding components of the compared vectors. Operating in a transconductane mode (voltage difference squaring transconductors) and a current mode (output square-root extracting circuit), our CMOS circuit is power saving. Its low-power operation results from the fact that sub-circuits of our calculator responsible for the squaring operations (a great number of them in case of large multidimensional vectors) consume no power in the absence of input signals. This takes place when corresponding components of the compared vectors are both equal to zero. The circuit also consumes a reasonably low amount of energy when processing (comparing) a different from zero input data (corresponding vector components). A simplified description of the applied differential squaring transconductors as well as the output current-mode square-root extraction circuit is given and a problem of good cooperation between them is discussed and proper solutions indicated. SPICE simulation results are shown to be in a good agreement with the theory presented.