Simulation of the surface plasmon polariton (SPP) distribution in the 10 μm long four-channel multiplexer is conducted in present paper. The excitation of the SPP was done using the 632.8 nm pulse laser with 50 fs pulse duration. The simulation processes of the SPP propagation in the fourchannel multiplexer were performed for the latter switched as a splitter as an adder. Though the obtained signal strength is low due to ohmic losses and signal reflections in the middle of the waveguide it is possible to registrate it. The detailed procedure of waveguides preparation, analysis and registration of SPP propagation is described in the paper. For the proposed model verification the two-channel 20 μm long splitter was formed by optical projection lithography. Studies have shown that the SPP is distributed throughout the whole structure of the 20 μm long two-channel splitter with a partial extinction due to ohmic losses.
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The paper deals with the problem of digital circuit design based on the current-mode gates - novel digital elements operating with a constant, continuous power supply current. The purpose is the provision of a high level noise immunity of chips which contain both analog and digital circuits. The logical properties and several identities of the current-mode logic and some expressions for a conversion of the Boolean functions into the current-mode functions are represented. Based on these properties and expressions, the approaches of minimizing the current logic functions are derived. Moreover, a new concept of the low-voltage current-mode gates realization and the two new types of the current-mode gates are designed for the next reduction of the current mode digital circuit complexity. Based on these approaches and new types of the gates, the functional schemes of some current-mode combinatorial and sequential circuits are derived. The obtained circuits are characterized by lower hardware overheads (up to 35%) in comparison with similar hardware based on the classical voltage type gates.
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Current-mode digital circuits operating with constant, continuous power supply current are presented. Layout of introduced gate and static, classical voltage inverter layout are shown for comparison. SPICE simulations based on extracted parameters of these gates are presented. The elementary operations that form current mode gate basis and elementary logical operations in this basis have been described. The problem of arithmetic-logic unit design based on the current-mode gates is considered.
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