Wyniki wyszukiwania - BazTech

Ograniczanie wyników

Znaleziono wyników: 2

Liczba wyników na stronie

Wyniki wyszukiwania

Wyszukiwano:
w słowach kluczowych: adaptive equalization

Sortuj według:

Ogranicz wyniki do:

Using Least Mean p-Power Algorithm to Correct Channel Distortion in MC-CDMA Systems

Zidane M., Safi S., Sabri M., Frikel M.

Journal of Telecommunications and Information Technology

2018

nr 3

23--30

This work focuses on adaptive Broadband Radio Access Network (BRAN) channel identiﬁcation and on downlink Multi-Carrier Code Division Multiple Access (MCCDMA) equalization. We use the normalized BRAN C channel model for 4G mobile communications, distinguishing between indoor and outdoor scenarios. On the one hand, BRAN C channel parameters are identiﬁed using the Least Mean p-Power (LMP) algorithm. On the other, we consider these coeﬃcients in the context of adaptive equalization. We provide an overview and a mathematic formulation of MC-CDMA systems. According to these fundamental concepts, the equalizer technique is investigated analytically to compensate for channel distortion in terms of the bit error rate (BER). The numerical simulation results, for various signal-to-noise ratios and diﬀerent p threshold, show that the presented algorithm is able to simulate the BRAN C channel measured with different accuracy levels. Furthermore, as far as the adaptive equalization problem is concerned, the results obtained using the zero-forcing equalizer demonstrate that the algorithm is adequate for some particular cases of threshold p.

Pipelined architectures for the frequency domain linear equalizer

Glentis G. O., Georgoulakis K.

International Journal of Applied Mathematics and Computer Science

2006

Vol. 16, no 4

525-535

In this paper, novel pipelined architectures for the implementation of the frequency domain linear equalizer are presented. The Frequency Domain (FD) LMS algorithm is utilized for the adaptation of equalizer coefficients. The pipelining of the FD LMS linear equalizer is achieved by introducing an amount of time delay into the original adaptive scheme, and following proper delay retiming. Simulation results are presented that illustrate the performance of the effect of the time delay introduced into the adaptation algorithm. The proposed architectures for efficient pipelining of the FD LMS linear equalization algorithm are suitable for implementation on special purpose hardware by means of the ASIC, ASIP or FPGA VLSI processors.