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1
Content available Verilog-A inductor compact model for the efficient simulation of Class-D VCOs
Fino M. H.
International Journal of Microelectronics and Computer Science
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2016
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Vol. 7, nr 3
114--118
EN
This paper presents the use of a Verilog-A compact model for integrated spiral inductors, for the simulation of Class-D CMOS oscillators. The model takes into consideration the geometric parameters characterizing the inductor layout, as well as the technological parameters. The accuracy of the model is checked against simulations with ASITIC simulator and limitations of the model are established. The model is integrated into Cadence environment, offering the designer the possibility to efficiently simulate radio frequency blocks considering the non-idealities of both the inductors and the transistors in nanometric technologies. The particular case for a class-D oscillator is illustrated.
2
Content available A Qucs/QucsStudio swept parameter technique for statistical circuit simulation
Brinson M. E.
International Journal of Microelectronics and Computer Science
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2013
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Vol. 4, nr 3
92--97
EN
Qucs and QucsStudio open source circuit simulators have a wealth of built in swept data features, including facilities for linear and logarithmic scans of simulation variables and for setting component values and device parameters. These simulators also allow semicolon separated lists of numerical values to be used as swept data. This little known feature provides a very flexible mechanism for generating component and device parameter statistical data. An outline of a statistical circuit simulation technique is presented in this paper. The proposed technique can be used with any general purpose circuit simulator equipped with swept data capabilities and as such is suitable for the study of device and circuit performance resulting from variations in device parameters and component values. The operation of the proposed simulation technique is illustrated with the results from an investigation of the statistical performance of a simple MOS current mirror integrated circuit cell, modeled with a speed optimized Verilog-A version of a long channel EPFL_EKV v2.6 MOS transistor model.
3
Content available Verilog-A Compact Semiconductor Device Modelling and Circuit Macromodelling with the QucsStudio-ADMS "Turn-Key" Modelling System
Brinson M. E., Margraf M.
International Journal of Microelectronics and Computer Science
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2012
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Vol. 3, nr 1
32-40
EN
The Verilog-A "Analogue Device Model Synthesizer" (ADMS) has in recent years become an established modelling tool for GNU General Public License circuit simulator development. Qucs and ngspice are two examples of open source circuit simulators that employ ADMS for compact semiconductor model construction. This paper presents a "turn- key" compact device modelling and circuit macromodelling system based on ADMS and implemented in the QucsStudio circuit design, simulation and manufacturing environment. A core feature of the new system is a modelling procedure which does not require users to manually patch, by hand, circuit simulator C++ code. At the start of QucsStudio simulation the software automatically detects any changes in Verilog-A model code, re-compiling and dynamically linking the modified code to the body of the QucsStudio cod e. The inherent flexibility of the "turn-key" system encourage s rapid experimentation with analogue and RF compact device models and circuit macromodels. In this paper QucsStudio "turn-key" modelling is illustrated by the design of a single stage RF amplifier circuit and the Harmonic Balance large signal AC simulation of a 50 Ω RF diode switch.
4
Content available Surface Potential Modeling of a High-k HfO2-Ta2O5 Capacitor in Verilog-A
Angelov G. V.
International Journal of Microelectronics and Computer Science
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2012
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Vol. 3, nr 3
111-118
EN
A compact model of a high-k HfO2-Ta2O5 mixed layer capacitor stack is developed in Matlab. Model equations are based on the surface potential PSP model. After fitting the C-V characteristics in Matlab the model is coded in Verilog-A hardware description language and it is implemented as external library in Spectre circuit simulator within Cadence CAD system. The results are validated against the experimental measurements of the HfO2-Ta2O5 stack structure.
5
Content available Adaptive EPFL-EKV Long and Short Channel MOS Device Models for Qucs, SPICE and Modelica Circuit Simulation
Brinson M. E., Nabijou H.
International Journal of Microelectronics and Computer Science
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2012
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Vol. 3, nr 1
1-6
EN
Equation-defined non-linear functional elements are important building blocks in the development of compact semiconductor device models. Current trends in compact device modelling suggest widespread acceptance among the modeling community of Verilog-A, for semiconductor device specification, model exchange and circuit simulation. This paper outlines techniques for the development of adaptive EPFL-EKV long and short channel MOS models which stress user selectable model features and diagnostic capabilities. Adaptive EPFL-EKV nMOS models based on Verilog-A and Modelica are introduced and their performance compared with simulation data obtained using the "Quite universal circuit simulator" (Qucs), SPICE and the Modelica simulation environment.
6
Content available Modeling the characteristics of high-k HfO2-Ta2O5 capacitor in Verilog-A
Angelov G. V.
International Journal of Microelectronics and Computer Science
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2011
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Vol. 2, nr 3
105-112
EN
A circuit simulation model of a MOS capacitor with high-k HfO2-Ta2O5 mixed layer is developed and coded in Verilog-A hardware description language. Model equations are based on the BSIM3v3 model core. Capacitance-voltage (C-V) and current-voltage (I-V) characteristics are simulated in Spectre circuit simulator within Cadence CAD system and validated against experimental measurements of the HfO2-Ta2O5 slack structure.
7
Content available A rapid analysis of very short channel MOSFET performances by using a dynamic simple model
Rabhi A., El`Hadj Bekka R., Benhamadouche A., Rahmoune F., Charlot J.-J.
International Journal of Microelectronics and Computer Science
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2010
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Vol. 1, nr 3
225-228
EN
A simplified MOSFET model is presented in this paper. The performances of the model, UNICELL (Unique Cell Model), are compared to those provided by BSIM3V3 taken as reference, even for very short channel length MOSFET (45 nm). It is shown that using only two UNICELL cells (BICELL) gives a good deal for CAD static and dynamic usage, because of the few number of parameters to be used in comparison to BSIM3. BICELL can also be used for determining internal performance analysis.
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