Wyniki wyszukiwania - BazTech

1

Design and characterization of passive integrated photonic structures

Kaźmierczak A.

Zeszyty Naukowe. Elektryka / Politechnika Łódzka

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2008

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z. 115

39-49

EN

In the paper the design and characterization of passive optical components for on-chip interconnections are shown. The presented devices are designed for fabrication in Silicon on Insulator (SOI) material platform. The analyzed devices include three types of optical add-drop filters based on microdisk resonators. Three topologies of filters are proposed, designed and characterized experimentally. Finally, the usefulness of proposed add-drop filters in integrated optical on chip interconnections networks is also discussed.

PL

W pracy przedstawiono teoretyczną i eksperymentalną analizę pasywnych zintegrowanych układów fotonicznych wykonanych w technologii krzemowej. Szczególna uwagę poświęcono elementom WDM bazującym na koncepcji rezonatora mikrodyskowego, stosowanej w urządzeniach WDM w telekomunikacji optycznej.

2

SOI monolithic active pixel detector technology for improvement of I-V characteristics and reliability

Niemiec H., Kucewicz W., Sapor M., Grabiec P., Kucharski K., Marczewski J., Tomaszewski D., Armstrong B. M., Bain M., Gamble F. R.

Electronics and Telecommunications Quarterly

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2008

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Vol. 54, No 4

507-512

EN

Monolithic active pixel detectors in SOI (Silicon On Insulator) technology are novel sensors of ionizing radiation, which exploit SOI substrates for the integration of readout electronics and a pixel detector. Breakdown voltage and leakage current of pixel diodes are very important parameters of the devices. This paper addresses recent development in the field of the technology of the SOI detectors, which lead to improvement of reliability and current-voltage characteristics of the sensors.

3

Characterization of SOI fabrication process using gated-diode measurements and TEM studies

Gibki J., Kątcki J., Ratajczak J., Łukasik L., Jakubowski A., Tomaszewski D.

Journal of Telecommunications and Information Technology

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2000

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nr 3-4

81-83

EN

SOI fabrication process was characterized using electrical and TEM methods. The investigated SOI structures included partially and fully depleted capacitors, gated diodes and transistors fabricated on SIMOX substrates. From C-V and I-V measurements of gated diodes, the following parameters of partially depleted structures were determined: doping concentration in both n- and p-type regions, average carrier generation lifetimes in the region under the gate and generation velocity at top and bottom surfaces of the active layer. Structures with short lifetime were studied using a transmission electron microscope. TEM studies indicate that the quality of the active layer in the investigated structures is good. Moreover, these studies were used to verify the thicknesses determined by means of electrical characterization methods.

4

Wyznaczanie generacyjnego czasu życia nośników mniejszościowych struktur SOI z elektrycznych charakterystyk diody z bramką

Gibki J., Jakubowski A.

Elektronika : konstrukcje, technologie, zastosowania

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1998

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Vol. 39, nr 6

14-18

PL

Przedstawiono rezultaty badań diod z bramką zrealizowanych w technologii SOI. Analiza kształtu charakterystyk prądowo-napięciowych tych diod pozwala na wyznaczenie parametrów procesów generacyjno-rekombinacyjnych w strukturach, takich jak generacyjny czas życia oraz prędkości generacji powierzchniowej na dolnej i górnej granicy Si-SiO2. Opracowana metoda wydaje się być bardzo dokładnym i efektywnym narzędziem charakteryzacji technologii.

EN

In this paper a study of gate-controlled diodes fabricated in SOI technology has been presented. I-U and C-V measurements of gatecon-trolled diodes allowed the generation-recombination parameters to be determined, such as carrier lifetime and the generation velocity for both the front and back Si-SiO2 interfaces. The developed method seems to be an accurate and effective tool for technology characterisation.