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1

Model konwersji A/C oraz demodulator IQ dla radaru z cyfrowym formowaniem wiązki

Nitecki D.

Elektronika : konstrukcje, technologie, zastosowania

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2013

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Vol. 54, nr 3

56-60

PL

W artykule omówiono zagadnienia dotyczące parametrów wielokanałowej konwersji analogowo-cyfrowej oraz cyfrowego demodulatora IQ. Przedstawiono cele prac modelowych z modułem konwersji A/C wraz z opisem ich realizacji. Opisano definicję i sposoby pomiaru parametrów konwersji analogowo-cyfrowej tj.: SFDR, SINAD, ENOB, THD oraz przesłuch międzykanałowy. Omówiono cyfrową demodulację IQ. Przedstawiono warunki pracy radaru oraz związane z nimi wymogi jakie muszą spełnić poszczególne etapy demodulacji. Opisano implementację cyfrowej demodulacji IQ w architekturze układu FPGA.

EN

This work concerns the necessary measures of the multi-channel ADC dynamic performance before the implementation of ADC module. It also presents the implmentation of the digital IQ demodulator in the FPGA device. Project based on the FPGA device allows to create multi-channel and fully-parallel systems. In addition one large FPGA devices allows to implement e.g. All digital IQ demodulation tracks in all receiving channels of the radar station. The system consists of FPGA also allows the designer to test the behavior of one component independenity of the others, which has a significant impact on ensuring the high reliability of the designed system.

2

DAC testing using impulse signals

Vedral J., Fexa P.

Metrology and Measurement Systems

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2012

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Vol. 19, nr 1

105-114

EN

The Multi-Tone (MT) signal with uniform amplitudes can be used for DAC testing. This paper shows an easier way to generate a MT signal using several impulse signals. The article also analyzes qualities of methods for testing the dynamic parameters of Digital to Analog Converters using an impulse signal. The MT, Damped Sine Wave (DSW) and Sinx/x (SINC) signals will be used as the source for these tests. The Effective Number of Bits (ENOB) and Signal to noise and distortion (SINAD) are evaluated in the frequency domain and they are modified using the Crest Factor (CF) correction and compared with the standard results of the Sine Wave FFT test. The first advantage of the test using an impulse signal is that you need fewer input parameters to create the band signal for testing the DAC. The second one is to reduce the testing time using a band signal in comparison with multiple tests using a single sine wave.

3

DAC testing using modulated signals

Fexa P., Verdal J., Svatoš J.

Metrology and Measurement Systems

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2011

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Vol. 18, nr 2

283-293

EN

This document analyses qualities of methods used for testing dynamical parameters of Digital-to-Analog Converters (DAC) using a multi-frequency signal. As the source for these signals, Amplitude Modulated (AM) and Frequency Modulated (FM) signals are used. These signals are often used in radio engineering. Results of the tests, like Effective Number of Bits (ENOB), Signal-to-Noise and Distortion (SINAD), are evaluated in the frequency domain and they are compared with standard results of Sine Wave FFT test methods. The aim of this research is firstly to test whether it is possible to test a DAC using modulated signals, secondly to reduce testing time, while estimating band performance of DAC.

4

Design and testing of CMOS asynchronous flash analog-to-digital converter

Frankiewicz M., Mroszczyk P., Gołda A., Kos A.

Elektronika : konstrukcje, technologie, zastosowania

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2009

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Vol. 50, nr 12

19-22

EN

The paper describes design and testing of the monolithic asynchronous analog-to-digital converter fabricated in CMOS AMS 0.35 µm technology. Two basic tests are applied to calculate error parameters of the ADC: code test to obtain a static characteristic and input-output test to measure the SNR (signal-to-noise), the ENOB (effective-number-of-bits), and propagation times to determine maximum conversion speed. Two different test circuits are used to measure these parameters. Unit under test is the 4-bit flash analog-to-digital asynchronous converter with additional error detection systems.

PL

Praca opisuje projekt i testy scalonego asynchronicznego przetwornika analogowo-cyfrowego typu flash wykonanego w technologii CMOS AMS 0,35 µm. W celu wyznaczenia parametrów i błędów układu zastosowano dwie metody: code test aby otrzymać charakterystykę statyczną i input-output test aby zmierzyć stosunek sygnału do szumu (SNR), efektywną liczbę bitów (ENOB) oraz czasy propagacji i maksymalną szybkość przetwarzania. Na potrzeby pomiarów zaprojektowano i zbudowano dwa układy testowe. Badany układ scalony stanowi 4-bitowy asynchroniczny przetwornik A/C z dodatkowymi układami wykrywającymi błędy przetwarzania.

5

Particularities of the cyclic A/D converters ENOB definition and measurement

Platonov A. A., Małkiewicz Ł. M.

Metrology and Measurement Systems

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2008

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Vol. 15, nr 1

9-22

EN

The paper is devoted to the methods of accurate assessment and analysis of the expected and actual effective number of bits (ENOB) of cyclic analog-to-digital converters. The equivalence of definition of ENOB in the IEEE Standard 1241-2000 and proposed in earlier author's works analytical definition formulated on the basis of distributions of the input signal and conversion errors. Indirect and direct methods of ENOB measurement are considered. The presented results can be used for a development of accurate methods of performance analysis and testing of the cyclic and other ADCs.

6

Formal definition and properties of FEB-based ENOB of intelligent cyclic ADC

Platonov A. A., Małkiewicz Ł., Jędrzejewski K.

Metrology and Measurement Systems

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2008

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Vol. 15, nr 3

267-280

EN

The paper presents a new approach to the measurement of effective resolution (effective number of bits - ENOB) of the cyclic A/D converters (CADCs). The core idea of the approach is a direct measurement of ENOB using, as a numerical measure, the number of true bits before the first erroneous bit (FEB) in the code of the sample. The position of FEB is determined by the first non-zero bit in the binary presentation of the conversion error. The FEB-based definition of ENOB is introduced and discussed. The results of simulation evaluations of FEB distributions in sequential cycles of conversion are presented and values of FEB-based ENOB are compared with the conventional ENOB evaluations. The influence of DNL and INL errors of internal A/D converter on directly and conventionally measured values of ENOB is analysed. The proposed method of ENOB measurement is less dependent on the class of the testing signal and can be used for more adequate assessment of actual ADC resolution.

7

Intelligent cyclic ADC principles of functioning, optimisation and analysis

Platonov A. A.

Metrology and Measurement Systems

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2006

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Vol. 13, nr 4

335-355

EN

The aim of the paper is a presentation of conceptual backgrounds of a new approach to design and analysis of high-efficient intelligent analog-to-digital converters (ADC). Particularities of intelligent conversion, methods of its practical implementation and advantages over conventional methods of conversion are discussed. The analysis is carried out on the example of "intelligent" cyclic ADC (IC ADC), which employ, as the prototype, the architecture of known cyclic ADC developed by Analog Devices Inc. [1, 2]. There is shown the method of extension of the proposed approach for development of more advanced versions of IC ADC with extended range of application and processing possibilities. The paper generalizes the results of previous investigations.

8

Application of digital dither to reduction of feedback D/A converters influence on intelligent cyclic A/D converters performance

Jędrzejewski K., Platonov A. A.

Metrology and Measurement Systems

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2006

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Vol. 13, nr 4

357-372

EN

The effect of termination of resolution growth, common for cyclic analogue-to-digital converters (CADCs) the, which appears after a definite (threshold) number of the conversion cycles, is investigated in the paper. The effect is caused by the finite resolution of the D/A converter (DAC) in the feedback chain. In an "intelligent" CADC (IC ADC, [1-6]), the growth of resolution can be restored by adding the digital dithering signal to the signal at the input of the feedback DAC. The dependence of the rate of restored growth of resolution on the distribution and amplitude of the dithering signal is investigated. The results of analysis are verified in advanced simulation experiments.