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1
Content available remote Particularities of the cyclic A/D converters ENOB definition and measurement
EN
The paper is devoted to the methods of accurate assessment and analysis of the expected and actual effective number of bits (ENOB) of cyclic analog-to-digital converters. The equivalence of definition of ENOB in the IEEE Standard 1241-2000 and proposed in earlier author's works analytical definition formulated on the basis of distributions of the input signal and conversion errors. Indirect and direct methods of ENOB measurement are considered. The presented results can be used for a development of accurate methods of performance analysis and testing of the cyclic and other ADCs.
2
Content available remote Formal definition and properties of FEB-based ENOB of intelligent cyclic ADC
EN
The paper presents a new approach to the measurement of effective resolution (effective number of bits - ENOB) of the cyclic A/D converters (CADCs). The core idea of the approach is a direct measurement of ENOB using, as a numerical measure, the number of true bits before the first erroneous bit (FEB) in the code of the sample. The position of FEB is determined by the first non-zero bit in the binary presentation of the conversion error. The FEB-based definition of ENOB is introduced and discussed. The results of simulation evaluations of FEB distributions in sequential cycles of conversion are presented and values of FEB-based ENOB are compared with the conventional ENOB evaluations. The influence of DNL and INL errors of internal A/D converter on directly and conventionally measured values of ENOB is analysed. The proposed method of ENOB measurement is less dependent on the class of the testing signal and can be used for more adequate assessment of actual ADC resolution.
3
Content available remote Intelligent cyclic ADC principles of functioning, optimisation and analysis
EN
The aim of the paper is a presentation of conceptual backgrounds of a new approach to design and analysis of high-efficient intelligent analog-to-digital converters (ADC). Particularities of intelligent conversion, methods of its practical implementation and advantages over conventional methods of conversion are discussed. The analysis is carried out on the example of "intelligent" cyclic ADC (IC ADC), which employ, as the prototype, the architecture of known cyclic ADC developed by Analog Devices Inc. [1, 2]. There is shown the method of extension of the proposed approach for development of more advanced versions of IC ADC with extended range of application and processing possibilities. The paper generalizes the results of previous investigations.
EN
The effect of termination of resolution growth, common for cyclic analogue-to-digital converters (CADCs) the, which appears after a definite (threshold) number of the conversion cycles, is investigated in the paper. The effect is caused by the finite resolution of the D/A converter (DAC) in the feedback chain. In an "intelligent" CADC (IC ADC, [1-6]), the growth of resolution can be restored by adding the digital dithering signal to the signal at the input of the feedback DAC. The dependence of the rate of restored growth of resolution on the distribution and amplitude of the dithering signal is investigated. The results of analysis are verified in advanced simulation experiments.
EN
The task of the paper is the presentation of a modelling approach to quantitative analysis of the influence of internal converter nonlinearities on the performance of sub-optimal intelligent cyclic A/D coverters (IC ADCs) developed and analysed in works [1-5] and others. The results of investigations permit to determine requirements to the analogue elements of IC ADC architecture, first of all to an internal low-bit A/D converter (ADCIn), which is the most crucial for the design and practical implementation of IC ADC.
PL
Celem niniejszego artykułu jest zaprezentowanie efektywnego podejścia do ilościowej i jakościowej analizy wpływu nieliniowości wewnętrznych przetworników ADCIn na jakość pracy sub-optymaInych cyklicznych przetworników analogowo cyfrowych (IC ADC) należących do nowej klasy przetworników A/C zaproponowanych i badanych w [1-5, 12, 13] i innych pracach. Wyniki przeprowadzonych badań pokazują, że w pewnym zakresie odchylenia charakterystyki przejściowej wewnętrznych przetworników ADCIn od jej nominalnej postaci (w przedstawionych eksperymentach do około 0.6-0.7 [LSB] w zależności od rozdzielczości przetwornika) nie wpływają na jakość pracy sub-optymaInych IC ADC. Eksperymenty potwierdziły stabilność empirycznych wartości ENOB, THD, SINAD w dość szerokim zakresie zmian całkowitej i różnicowej nieliniowości ADCIn. Zaproponowana w pracy metoda analizy symulacyjnej pozwala na ocenę granic odpowiednich przedziałów tolerancji, co z kolei pozwala obniżyć wymagania technologiczne oraz obniżyć koszty produkcji wewnętrznych przetworników ADCIn, a co za tym idzie obniża ogólne koszty produkcji IC ADC.
6
Content available remote Smart Wide-range Measurements Using Adaptively Adjusted Sensors
EN
In this paper, a new class of intelligent analog-digital systems for the measurement of mechanical quantities, such as acceleration, displacement, mass size, pressure and others, is considered. The basic feature of these systems is that they employ sensors with parameters adjusted adaptively to the statistics of measured processes and disturbances. The problems of practical realization of such systems are considered. For reason of superior quality characteristics and low cost, as a reference point for the design of the proposed measurement systems, electromechanical sensors based on quartz glass technology have been chosen. Necessary modifications of conventional sensors allowing a considerable extension of the dynamic range of measuremnts without loss accuracy are proposed. Some properties of quartz glass technology are also briefly discussed.
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