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1

Recent developments in Qucs-s Equation-Defined modelling of semiconductor devices and IC’s

Brinson M., Kuznetsov V.

International Journal of Microelectronics and Computer Science

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2017

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Vol. 8, nr 1

29--35

EN

The Qucs Equation-Defined Device was introduce roughly ten years ago as a versatile behavioural simulation component for modelling the non-linear static and dynamic properties of passive components, semiconductor devices and IC macromodels. Today, this component has become an established element for building experimental device simulation models. It’s inherent interactive properties make it ideal for device and circuit modelling via Qucs schematics. Moreover, Equation-Defined Devices often promote a clearer understanding of the factors involved in the construction of complex compact semiconductor simulation models. This paper is concerned with recent advances in Qucs-S/Ngspice/XSPICE modelling capabilities that improve model construction and simulation run time performance of Equation-Defined Devices using XSPICE model syntheses. To illustrate the new Qucs-S modelling techniques an XSPICE version of the EPFL EKV v2.6 long channel transistor model together with other illustrative examples are described and their performance simulated with Qucs-S and Ngspice.

2

Current conveyor equation-defined macromodels for wideband RF circuit design

Brinson M., Kuznetsov V.

International Journal of Microelectronics and Computer Science

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2017

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Vol. 8, nr 2

65--71

EN

A high percentage of analogue integrated circuit designs use voltage domain signal processing techniques. Given the fact that integrated circuit current conveyors are high bandwidth current processing devices, often with superior RF performance compared to comparable voltage domain devices, it is surprising that the number of current mode integrated circuits available, as standard of-the-shelf industrial items, is so small. This paper introduces equation-defined device and Verilog-A synthesis approaches to the macromodelling of current conveyor integrated circuits. To illustrate the proposed modelling techniques the properties of a number of modular behavioural level current conveyor macromodel cells are described and their performance compared. The material presented is intended for analogue device modellers and circuit designers who wish to simulate large signal current domain integrated circuit designs. It also demonstrates how synthesized Verilog-A modules can be derived from equation-defined device and conventional subcircuits to form functional, computationally efficient current conveyor macromodels. To illustrate the application of behavioural current conveyor macromodels the design of a six cell CCII+ instrumentation amplifier is introduced and its performance discussed.

3

Qucs equation-defined and Verilog-A higher order behavioral device models for harmonic balance circuit simulation

Brinson M., Kuznetsov V.

International Journal of Microelectronics and Computer Science

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2015

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Vol. 6, nr 2

49--58

EN

This paper is concerned with the development and evaluation of a number of modeling techniques which improve Qucs Harmonic Balance simulation performance of RF compact device models. Although Qucs supports conventional SPICE semiconductor device models, whose static current/voltage and dynamic charge characteristics exhibit second and higher order derivatives may not be continuous, there is no guarantee that these will function without Harmonic Balance simulation convergence problems. The same comment also applies to a number of legacy compact semiconductor device models. The modeling of semiconductor devices centered on non-linear Equation-Defined Devices and blocks of Verilog-A code, combined with linear components, is introduced. These form a class of compact macromodel that has improved Harmonic Balance simulation performance. To illustrate the presented modeling techniques RF diode, BJT and MESFET macromodels are described and their Harmonic Balance performance simulated with Qucs and Xyce©.