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Performance Targeted Synthesis of ASM Controllers on FPGA

Salauyou V., Bulatowa I.

Measurement Automation Monitoring

2018

Vol. 64, No. 2

31--33

Performance-driven synthesis of controller circuits is very important and challenging task in digital systems design. The clock frequency of a synchronous sequential logic circuit is dependent in a large part on the maximum propagation delay through its combinational block. The paper presents a new method for FPGA-based design of high-speed Algorithmic State Machine (ASM) controllers. The proposed approach is based on the introduction of additional states of the state machine in order to simplify transition and output logical functions to implement them in the single-level structures. The proposed technique is applied at the stage of converting the ASM chart to the finite state machine description and allows obtaining such an HDL specification that provides an increase in the designed system speed. Experimental results show that our approach achieves an average performance gain of 22.24% to 29.72% (for various FPGA devices) compared with the conventional synthesis method.